IC MCU 8BIT OTP 4K 20 PDIP

ST62T20CB6

Manufacturer Part NumberST62T20CB6
DescriptionIC MCU 8BIT OTP 4K 20 PDIP
ManufacturerSTMicroelectronics
SeriesST6
ST62T20CB6 datasheet
 


Specifications of ST62T20CB6

Core ProcessorST6Core Size8-Bit
Speed8MHzPeripheralsLVD, POR, WDT
Number Of I /o12Program Memory Size4KB (4K x 8)
Program Memory TypeOTPRam Size64 x 8
Voltage - Supply (vcc/vdd)3 V ~ 6 VData ConvertersA/D 8x8b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case20-DIP (0.300", 7.62mm)Controller Family/seriesST6
No. Of I/o's12Ram Memory Size64Byte
Cpu Speed8MHzNo. Of Timers1
Rohs CompliantYesProcessor SeriesST62T2x
CoreST6Data Bus Width8 bit
Data Ram Size64 BMaximum Clock Frequency8 MHz
Number Of Programmable I/os12Number Of Timers2
Operating Supply Voltage3 V to 6 VMaximum Operating Temperature+ 85 C
Mounting StyleThrough HoleDevelopment Tools By SupplierST622XC-KIT/110, ST62GP-EMU2, ST62E2XC-EPB/110, ST62E6XC-EPB/US, STREALIZER-II
Minimum Operating Temperature- 40 COn-chip Adc8 bit
Lead Free Status / RoHS StatusLead free / RoHS CompliantEeprom Size-
Connectivity-Other names497-2098-5
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Page 65/104

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OPERATING CONDITIONS (Cont’d)
10.3.2 Operating Conditions with Low Voltage Detector (LVD)
Subject to general operating conditions for V
Symbol
Parameter
Reset release threshold
V
IT+
(V
rise)
DD
Reset generation threshold
V
IT-
(V
fall)
DD
V
LVD voltage threshold hysteresis
hys
2)
Vt
V
rise time rate
POR
DD
t
Filtered glitch delay on V
g(VDD)
Notes:
1. LVD typical data are based on T
2. The minimum V
rise time rate is needed to insure a correct device power-on and LVD reset. Not tested in production.
DD
3. Data based on characterization results, not tested in production.
Figure 39. LVD Threshold Versus V
f
[MHz]
OSC
8
DEVICE UNDER
RESET
IN THIS AREA
4
0
2.5
3
Figure 40. Typical LVD Thresholds Versus
Temperature for OTP devices
Thresholds [V]
4.2
4
3.8
3.6
-40°C
25°C
T [°C]
ST6208C/ST6209C/ST6210C/ST6220C
, f
, and T
DD
OSC
A
Conditions
V
-V
IT+
IT-
3)
Not detected by the LVD
DD
=25°C. They are given only as design guidelines and are not tested.
A
3)
and f
DD
OSC
≥3.6
V
IT-
3.5
4
4.5
Figure
Temperature for ROM devices
Thresholds [V]
4.2
4
Vdd up
V
IT+
V
Vdd down
3.8
IT-
3.6
95°C
125°C
-40°C
.
1)
Min
Typ
Max
3.9
4.1
4.3
3.6
3.8
50
300
700
30
FUNCTIONALITY
NOT GUARANTEED
IN THIS AREA
FUNCTIONAL AREA
SUPPLY
VOLTAGE [V]
5
5.5
6
41.
Typical
LVD
thresholds
V
V
25°C
95°C
T [°C]
Unit
V
4
mV
mV/s
ns
vs.
Vdd up
IT+
Vdd down
IT-
125°C
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