ST62T20CB6 STMicroelectronics, ST62T20CB6 Datasheet - Page 72

IC MCU 8BIT OTP 4K 20 PDIP

ST62T20CB6

Manufacturer Part Number
ST62T20CB6
Description
IC MCU 8BIT OTP 4K 20 PDIP
Manufacturer
STMicroelectronics
Series
ST6r
Datasheet

Specifications of ST62T20CB6

Core Processor
ST6
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, WDT
Number Of I /o
12
Program Memory Size
4KB (4K x 8)
Program Memory Type
OTP
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 6 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Controller Family/series
ST6
No. Of I/o's
12
Ram Memory Size
64Byte
Cpu Speed
8MHz
No. Of Timers
1
Rohs Compliant
Yes
Processor Series
ST62T2x
Core
ST6
Data Bus Width
8 bit
Data Ram Size
64 B
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Operating Supply Voltage
3 V to 6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
ST622XC-KIT/110, ST62GP-EMU2, ST62E2XC-EPB/110, ST62E6XC-EPB/US, STREALIZER-II
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
In Transition
Other names
497-2098-5
ST6208C/ST6209C/ST6210C/ST6220C
10.5 CLOCK AND TIMING CHARACTERISTICS
Subject to general operating conditions for V
10.5.1 General Timings
Symbol
Parameter
t
Instruction cycle time
c(INST)
Interrupt reaction time
t
= Δt
v(IT)
t
+ 6
v(IT)
c(INST)
10.5.2 External Clock Source
Symbol
Parameter
V
OSC
input pin high level voltage
OSCINH
IN
V
OSC
input pin low level voltage
OSCINL
IN
I
OSCx Input leakage current
L
Notes:
1. Data based on typical application software.
2. Time measured between interrupt event and interrupt vector fetch. Δt
the current instruction execution.
Figure 49. Typical Application with an External Clock Source
V
OSCINH
V
OSCINL
Not connected
EXTERNAL
CLOCK SOURCE
72/104
1
, f
, and T
DD
OSC
A
Conditions
f
=8 MHz
CPU
2)
f
=8 MHz
CPU
Conditions
See
Figure 49
≤V
≤V
V
SS
IN
DD
90%
10%
OSC
OUT
OSC
IN
.
1)
Min
Typ
Max
2
4
5
3.25
6.5
8.125
6
11
9.75
17.875
Min
Typ
Max
0.7xV
V
DD
DD
V
0.3xV
SS
± 2
is the number of t
cycles needed to finish
c(INST)
CPU
f
OSC
I
L
ST62XX
Unit
t
CPU
μs
t
CPU
μs
Unit
V
DD
μA

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