IC MCU 8BIT OTP 4K 20 PDIP

ST62T20CB6

Manufacturer Part NumberST62T20CB6
DescriptionIC MCU 8BIT OTP 4K 20 PDIP
ManufacturerSTMicroelectronics
SeriesST6
ST62T20CB6 datasheet
 

Specifications of ST62T20CB6

Core ProcessorST6Core Size8-Bit
Speed8MHzPeripheralsLVD, POR, WDT
Number Of I /o12Program Memory Size4KB (4K x 8)
Program Memory TypeOTPRam Size64 x 8
Voltage - Supply (vcc/vdd)3 V ~ 6 VData ConvertersA/D 8x8b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case20-DIP (0.300", 7.62mm)Controller Family/seriesST6
No. Of I/o's12Ram Memory Size64Byte
Cpu Speed8MHzNo. Of Timers1
Rohs CompliantYesProcessor SeriesST62T2x
CoreST6Data Bus Width8 bit
Data Ram Size64 BMaximum Clock Frequency8 MHz
Number Of Programmable I/os12Number Of Timers2
Operating Supply Voltage3 V to 6 VMaximum Operating Temperature+ 85 C
Mounting StyleThrough HoleDevelopment Tools By SupplierST622XC-KIT/110, ST62GP-EMU2, ST62E2XC-EPB/110, ST62E6XC-EPB/US, STREALIZER-II
Minimum Operating Temperature- 40 COn-chip Adc8 bit
Lead Free Status / RoHS StatusLead free / RoHS CompliantEeprom Size-
Connectivity-Other names497-2098-5
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Page 80/104

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ST6208C/ST6209C/ST6210C/ST6220C
EMC CHARACTERISTICS (Cont’d)
10.7.3 ESD Pin Protection Strategy
To protect an integrated circuit against Electro-
Static Discharge the stress must be controlled to
prevent degradation or destruction of the circuit el-
ements. The stress generally affects the circuit el-
ements which are connected to the pads but can
also affect the internal devices when the supply
pads receive the stress. The elements to be pro-
tected must not receive excessive current, voltage
or heating within their structure.
An ESD network combines the different input and
output ESD protections. This network works, by al-
lowing safe discharge paths for the pins subjected
to ESD stress. Two critical ESD stress cases are
presented in
Figure 59
and
Figure 60
pins.
Figure 59. Positive Stress on a Standard Pad vs. V
V
DD
Main path
Path to avoid
V
SS
Figure 60. Negative Stress on a Standard Pad vs. V
V
DD
Main path
V
SS
80/104
1
Standard Pin Protection
To protect the output structure the following ele-
ments are added:
– A diode to V
– A protection device between V
To protect the input structure the following ele-
ments are added:
– A resistor in series with the pad (1)
– A diode to V
– A protection device between V
for standard
SS
(3a)
(4)
OUT
(3b)
DD
(3a)
(4)
OUT
(3b)
(3a) and a diode from V
DD
SS
and V
DD
SS
(2a) and a diode from V
DD
SS
and V
DD
SS
(2a)
(1)
IN
(2b)
(2a)
(1)
IN
(2b)
(3b)
(4)
(2b)
(4)
V
DD
V
SS
V
DD
V
SS