STM32F101V8T6 STMicroelectronics, STM32F101V8T6 Datasheet - Page 82

MCU ARM 64KB FLASH/TIMER 100LQFP

STM32F101V8T6

Manufacturer Part Number
STM32F101V8T6
Description
MCU ARM 64KB FLASH/TIMER 100LQFP
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet

Specifications of STM32F101V8T6

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
36MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
DMA, PDR, POR, PVD, PWM, Temp Sensor, WDT
Number Of I /o
80
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
STM32F101x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
10 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
36 MHz
Number Of Programmable I/os
100
Number Of Timers
3 x 16 bit
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWARM, EWARM-BL, MDK-ARM, RL-ARM, ULINK2
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
For Use With
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Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
497-6060

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Revision history
82/87
Table 54.
22-Nov-2007
Date
Document revision history (continued)
Revision
4
Document status promoted from preliminary data to datasheet. Small
text changes.
STM32F101CB part number corrected in
Number of communication peripherals corrected for STM32F101Tx in
Table 2: Device features and peripheral counts (STM32F101xx medium-
density access line)
Power supply schemes on page 16
Main function and default alternate function modified for PC14 and PC15
in
Remap column added.
Figure 11: Power supply scheme
and
in
Note 2
characteristics.
48 and 72 MHz frequencies removed from
Table
consumption on page
I
added in
and Standby
on page
Figure 17: Typical current consumption in Stop mode with regulator in
Low-power mode versus temperature at VDD = 3.3 V and 3.6 V
Note removed below
CPHA =
mode and CPHA =
Figure 34: Typical connection diagram using the ADC
t
respectively. Maximum values removed from
wakeup
endurance and data
characteristics.
Impedance size specified in
page
Section 5.3.11: Absolute maximum ratings (electrical sensitivity)
updated.
Details on unused pins removed from
characteristics on page
Table 41: SPI characteristics
Table 42: ADC
Note 3
conditions. Avg_Slope and V
Θ
characteristics.
Order codes replaced by
DD_VBAT
SU(HSE)
JA
Table 4: Medium-density STM32F101xx pin
Table 6: Current
value for VFQFPN36 package added in
Note 1
Doc ID 13586 Rev 14
71. Small text changes in
14. MCU ‘s operating conditions modified in
added in
and
timings. t
and t
42.
0. Note added below
typical value at 2.4 V modified and I
Table 15: Typical and maximum current consumptions in Stop
modified in
Note 2
Table 18: Peripheral current consumption
modes. Note added in
SU(LSE)
characteristics. Note added in
I2C interface characteristics on page 60
Table 10: Embedded reset and power control block
RET
characteristics.
added below
1(1).
and Number of GPIOs corrected for LQFP package.
retention. Conditions modified in
Figure 30: SPI timing diagram - slave mode and
conditions modified in
conditions modified in
41.
Table 5: Voltage
54.
Section 7: Ordering information
A.4: Voltage glitch on ADC input 0 on
25
updated. Notes added and I
Figure 31: SPI timing diagram - slave
Changes
modified in
Table 35: Output voltage
Table 44: ADC accuracy - limited test
modified. V
modified.
Table 16 on page 41
General input/output
STM32F101x8, STM32F101xB
characteristics.
Table 1: Device
Table
Table 46: TS
Table 52: Package thermal
Table 21
Table 28: Flash memory
DD
Table 25: Low-power mode
DD_VBAT
Table 43
definitions,
− V
12,
Typical current
SS
Table 13
and
Table 29: EMS
maximum value
modified.
modified.
ratings modified
and
Note 1
modified.
characteristics.
characteristics.
lkg
and
scheme.
Table
summary.
Note 6
Table
removed in
Table 17
and
modified
22,
added.
added,
46.

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