MC908QB8CDWE Freescale Semiconductor, MC908QB8CDWE Datasheet - Page 136

IC MCU 8BIT 8K FLASH 16-SOIC

MC908QB8CDWE

Manufacturer Part Number
MC908QB8CDWE
Description
IC MCU 8BIT 8K FLASH 16-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908QB8CDWE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-SOIC (0.300", 7.5mm Width)
Processor Series
HC08QB
Core
HC08
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
14
Number Of Timers
4
Operating Supply Voltage
3 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05AE, DEMO908QB8, DEMO908QC16
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
For Use With
DEMO908QB8 - BOARD DEMO FOR MC68HC908QB8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Enhanced Serial Communications Interface (ESCI) Module
ARUN— Arbiter Counter Running Flag
AROVFL— Arbiter Counter Overflow Bit
ARD8— Arbiter Counter MSB
13.9.2 ESCI Arbiter Data Register
ARD7–ARD0 — Arbiter Least Significant Counter Bits
13.9.3 Bit Time Measurement
Two bit time measurement modes, described here, are available according to the state of ACLK.
136
1. ACLK = 0 — The counter is clocked with one quarter of the bus clock. The counter is started when
2. ACLK = 1 — The counter is clocked with one half of the ESCI input clock generated by the ESCI
This read-only bit indicates the arbiter counter is running.
This read-only bit indicates an arbiter counter overflow. Clear AROVFL by writing any value to
SCIACTL. Writing 0s to AM1 and AM0 resets the counter keeps it in this idle state.
This read-only bit is the MSB of the 9-bit arbiter counter. Clear ARD8 by writing any value to SCIACTL.
These read-only bits are the eight LSBs of the 9-bit arbiter counter. Clear ARD7–ARD0 by writing any
value to SCIACTL. Writing 0s to AM1 and AM0 permanently resets the counter and keeps it in this idle
state.
1 = Arbiter counter running
0 = Arbiter counter stopped
1 = Arbiter counter overflow has occurred
0 = No arbiter counter overflow has occurred
a falling edge on the RxD pin is detected. The counter will be stopped on the next falling edge.
ARUN is set while the counter is running, AFIN is set on the second falling edge on RxD (for
instance, the counter is stopped). This mode is used to recover the received baud rate. See
Figure
prescaler. The counter is started when a 0 is detected on RxD (see
enabling the bit time measurement with ACLK = 1 leads to immediate start of the counter (see
Figure
measure the length of a received break.
13-20.
13-22). The counter will be stopped on the next rising edge of RxD. This mode is used to
Reset:
Read:
Write:
ARD7
Bit 7
0
Figure 13-19. ESCI Arbiter Data Register (SCIADAT)
= Unimplemented
ARD6
6
0
MC68HC908QB8 Data Sheet, Rev. 3
ARD5
5
0
ARD4
0
4
ARD3
3
0
ARD2
2
0
Figure
ARD1
1
0
13-21). A 0 on RxD on
Freescale Semiconductor
ARD0
Bit 0
0

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