MC908QB8CDWE Freescale Semiconductor, MC908QB8CDWE Datasheet - Page 173

IC MCU 8BIT 8K FLASH 16-SOIC

MC908QB8CDWE

Manufacturer Part Number
MC908QB8CDWE
Description
IC MCU 8BIT 8K FLASH 16-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908QB8CDWE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-SOIC (0.300", 7.5mm Width)
Processor Series
HC08QB
Core
HC08
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
14
Number Of Timers
4
Operating Supply Voltage
3 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05AE, DEMO908QB8, DEMO908QC16
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
For Use With
DEMO908QB8 - BOARD DEMO FOR MC68HC908QB8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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MODF — Mode Fault Bit
SPTE — SPI Transmitter Empty Bit
MODFEN — Mode Fault Enable Bit
SPR1 and SPR0 — SPI Baud Rate Select Bits
Freescale Semiconductor
This clearable, read-only flag is set in a slave SPI if the SS pin goes high during a transmission with
MODFEN set. In a master SPI, the MODF flag is set if the SS pin goes low at any time with the
MODFEN bit set. Clear MODF by reading the SPI status and control register (SPSCR) with MODF set
and then writing to the SPI control register (SPCR).
This clearable, read-only flag is set each time the transmit data register transfers a byte into the shift
register. SPTE generates an SPTE interrupt request if the SPTIE bit in the SPI control register is also
set.
During an SPTE interrupt, user software can clear SPTE by writing to the transmit data register.
This read/write bit, when set, allows the MODF flag to be set. If the MODF flag is set, clearing MODFEN
does not clear the MODF flag. If the SPI is enabled as a master and the MODFEN bit is 0, then the SS
pin is available as a general-purpose I/O.
If the MODFEN bit is 1, then this pin is not available as a general-purpose I/O. When the SPI is enabled
as a slave, the SS pin is not available as a general-purpose I/O regardless of the value of MODFEN.
See
If the MODFEN bit is 0, the level of the SS pin does not affect the operation of an enabled SPI
configured as a master. For an enabled SPI configured as a slave, having MODFEN low only prevents
the MODF flag from being set. It does not affect any other part of SPI operation. See
Fault Error.
In master mode, these read/write bits select one of four baud rates as shown in
SPR0 have no effect in slave mode.
Use this formula to calculate the SPI baud rate:
1 = SS pin at inappropriate logic level
0 = SS pin at appropriate logic level
1 = Transmit data register empty
0 = Transmit data register not empty
15.7.4 SS (Slave Select).
Do not write to the SPI data register unless SPTE is high.
Table 15-3. SPI Master Baud Rate Selection
SPR1 and SPR0
00
01
10
11
MC68HC908QB8 Data Sheet, Rev. 3
Baud rate =
NOTE
BUSCLK
Baud Rate Divisor (BD)
BD
128
32
2
8
Table
15-3. SPR1 and
15.3.6.2 Mode
Registers
173

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