R5F21244SNFP#U0 Renesas Electronics America, R5F21244SNFP#U0 Datasheet - Page 105

IC R8C MCU FLASH 16K 52LQFP

R5F21244SNFP#U0

Manufacturer Part Number
R5F21244SNFP#U0
Description
IC R8C MCU FLASH 16K 52LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/24r
Datasheets

Specifications of R5F21244SNFP#U0

Core Processor
R8C
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
52-LQFP
For Use With
R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F21244SNFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
R5F21244SNFP#U0R5F21244SNFP#V2
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
R5F21244SNFP#U0R5F21244SNFP#X6
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Rev.2.00 Oct 17, 2005
REJ09B0001-0200
LDC
[ Syntax ]
[ Operation ]
[ Function ]
[ Selectable src/dest ]
[ Flag Change ]
[ Description Example ]
[ Related Instructions ]
Chapter 3
*1 Operation is performed on the stack pointer indicated by the U flag.
Change
R0L/R0
A0/A0
dsp:8[A0]
dsp:16[A0] dsp:16[A1]
dsp:20[A0] dsp:20[A1]
R2R0
LDC
dest
Flag
• This instruction transfers
• If the destination is INTBL or INTBH, make sure that bytes are transferred in succession.
• No interrupt requests are accepted immediately after this instruction.
LDC
LDC
memory, the required memory capacity is 2 bytes.
*2 *2 *2 *2 *2 *2 *2 *2
U
src,dest
src
R0H/R1
A1/A1
dsp:8[A1]
R3R1
I
Functions
R0,SB
A0,FB
O
page 85 of 263
B
src
S
R1L/R2
[A0]
dsp:8[SB]
dsp:16[SB]
abs20
A1A0
POPC, PUSHC, STC, LDINTB
Z
src
D
to the control register indicated by
Transfer to control register
LoaD Control register
C
R1H/R3
[A1]
dsp:8[FB]
abs16
#IMM
*2 The flag changes only when
FB
FLG
SB
INTBH
[ Instruction Code/Number of Cycles ]
dest
dest
SP
INTBL
. If
dest
*1
src
is FLG.
is a location in the
ISP
3.2 Functions
LDC
Page: 189

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