R5F21244SNFP#U0 Renesas Electronics America, R5F21244SNFP#U0 Datasheet - Page 137

• Manufacturer Part Number: R5F21244SNFP#U0
• Description: IC R8C MCU FLASH 16K 52LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/24r

Specifications of R5F21244SNFP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 52-LQFP
• For Use With: R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Rev.2.00 Oct 17, 2005
REJ09B0001-0200
SHL
[ Syntax ]
[ Operation ]
[ Function ]
[ Selectable src/dest ]
[ Flag Change ]
[ Description Example ]
[ Related Instructions ]
Chapter 3
*1 If
*2 The acceptable range of values is –8 < #IMM < +8. However, 0 is invalid.
*3 Only (.L) can be selected as the size specifier (.size). (.B) or (.W) can also be specified for
Change
Conditions
R0L/R0
A0/A0
dsp:8[A0]
dsp:16[A0] dsp:16[A1]
dsp:20[A0] dsp:20[A1]
R2R0
SHL.size
Flag
• This instruction logically shifts
• The direction of shift is determined by the sign of
• If
• If
• If
S :
Z :
C :
SHL.B
SHL.B
SHL.L
from LSB (MSB) are transferred to the C flag.
bits are shifted right.
equal to 0, or greater than +8 are not valid.
Although a value of 0 may be set, no bits are shifted and no flags are changed. If a value less than –8
or greater than +8 is set, the result of the shift is undefined.
–16 to +16. Although a value of 0 may be set, no bits are shifted and no flags are changed. If a value
less than –16 or greater than +16 is set, the result of the shift is undefined.
src
src
src
src
U
When
The flag is set when the operation results in MSB = 1; otherwise cleared.
The flag is set when the operation results in 0; otherwise cleared. However, the flag is undefined
if (.L) is selected as the size specifier (.size).
The flag is set when the bit shifted out last is 1; otherwise cleared. However, the flag is undefined
if (.L) is selected as the size specifier (.size).
is R1H, R1 or R1H cannot be chosen for
When
is a register and (.B) is selected as the size specifier (.size), the number of bits shifted is –8 to +8.
is a register and (.W) or (.L) is selected as the size specifier (.size), the number of bits shifted is
is an immediate value, the number of bits shifted is –8 to –1 or +1 to +8. Values less than –8,
R0H/R1
A1/A1
dsp:8[A1]
R3R1
I
Functions
#3,R0L
#–3,R0L
R1H,R2R0
src
src
O
< 0
page 117 of 263
> 0
src,dest
B
src
R1L/R2
[A0]
dsp:8[SB]
dsp:16[SB]
abs20
A1A0
S
ROLC, RORC, ROT, SHA
Z
dest
D
C
0
R1H
[A1]
dsp:8[FB]
abs16
#IMM
C
left or right the number of bits indicated by
B , W , L
SHift Logical
*1
*1 If the number of bits shifted is 0, no flags are changed.
*2
/R3
Shift logical
MSB
MSB
dest
R0L/R0
A0/A0
dsp:8[A0]
dsp:16[A0] dsp:16[A1] dsp:16[SB] abs16
dsp:20[A0] dsp:20[A1] abs20
R2R0
src
; Logically shifted left
; Logically shifted right
.
. If
*3
dest
dest
src
is positive, bits are shifted left; if negative,
R0H/R1
A1/A1
dsp:8[A1]
R3R1
[ Instruction Code/Number of Cycles ]
*3
*1
LSB
LSB
dest
R1L/R2
[A0]
dsp:8[SB]
A1A0
src
C
0
. Bits overflowing
R1H/R3
[A1]
dsp:8[FB]
3.2
Page: 228
dest
Functions
SHL
*1
.