R5F21244SNFP#U0 Renesas Electronics America, R5F21244SNFP#U0 Datasheet - Page 57

• Manufacturer Part Number: R5F21244SNFP#U0
• Description: IC R8C MCU FLASH 16K 52LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/24r

Specifications of R5F21244SNFP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 52-LQFP
• For Use With: R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Rev.2.00 Oct 17, 2005
REJ09B0001-0200
Chapter 3 Functions
R0L/R0
A0/A0
dsp:8[A0]
dsp:16[A0] dsp:16[A1]
dsp:20[A0] dsp:20[A1]
R2R0
(4) Operation
(5) Function
(6) Selectable src / dest (label)
(7) Flag change
(8) Description example
(9) Related instructions
Explains the operation of the instruction using symbols.
Explains the function of the instruction and precautions to be taken when using the instruction.
If the instruction has operands, the valid formats are listed here.
(a) Items that can be selected as src (source)
(b) Items that can be selected as dest (destination)
(c) Addressing modes that can be selected
(d) Addressing modes that cannot be selected
(e) Shown on the left side of the slash (R0H) is the addressing mode when data is handled in bytes (8 bits).
Shows a flag change that occurs after the instruction is executed. The symbols in the table mean the
following.
Description examples for the instruction.
Related instructions that cause an operation similar or opposite to that of the instruction.
Shown on the right side of the slash (R1) is the addressing mode when data is handled in words (16 bits).
“
“O” The flag changes depending on a condition.
—
” The flag does not change.
R0H/R1
A1/A1
dsp:8[A1]
R3R1
page 37 of 263
src
R1L/R2
[A0]
dsp:8[SB]
dsp:16[SB]
abs20
A1A0
R1H/R3
[A1]
dsp:8[FB] dsp:8[A0]
abs16
#IMM
dsp:8[SP]
R0L/R0
A0/A0
dsp:16[A0] dsp:16[A1] dsp:16[SB] abs16
dsp:20[A0] dsp:20[A1] abs20
R2R0
R0H/R1
A1/A1
dsp:8[A1]
R3R1
dest
R1L/R2
[A0]
dsp:8[SB]
A1A0
3.1 Guide to This Chapter
R1H/R3
[A1]
dsp:8[FB]
dsp:8[SP]
(a)
(b)
(c)
(d)
(e)