R5F21256SNFP#U0 Renesas Electronics America, R5F21256SNFP#U0 Datasheet - Page 267

• Manufacturer Part Number: R5F21256SNFP#U0
• Description: IC R8C MCU FLASH 32K 52LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/25r

Specifications of R5F21256SNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 52-LQFP
• For Use With: R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Rev.2.00 Oct 17, 2005
REJ09B0001-0200
Note 1: This is a dedicated interrupt used by development support tools. Do not use this interrupt.
Table 5.1.1 Interrupt Sources (Nonmaskable) and Fixed Vector Tables
Chapter 5
BRK Instruction
Watchdog Timer•Oscil-
lation Stop Detection
Undefined Instruction
Overflow
Address Match
Single Step
(Reserved)
(Reserved)
Reset
5.1.2 Software Interrupts
Software interrupts are generated by an instruction that generates an interrupt request when executed.
Software interrupts are nonmaskable.
This interrupt occurs when the UND instruction is executed.
This interrupt occurs if the INTO instruction is executed when the O flag is set to 1 (arithmetic result is
overflow).
The instructions that cause the O flag to change are as follows: ABS, ADC, ADCF, ADD, CMP, DIV,
DIVU, DIVX, NEG, RMPA, SBB, SHA, SUB.
This interrupt occurs when the BRK instruction is executed.
This interrupt occurs when the INT instruction is executed. The software interrupt numbers which can be
specified by the INT instruction are 0 to 63. Note that software interrupt numbers 4 to 31 are assigned to
peripheral function interrupts. This means that it is possible to execute the same interrupt routines used
by peripheral function interrupts by executing the INT instruction.
For software interrupt numbers 0 to 31, the U flag is saved when the INT instruction is executed and the
U flag is cleared to 0 to choose the interrupt stack pointer (ISP) before executing the interrupt sequence.
The U flag before the interrupt occurred is restored when control returns from the interrupt routine. For
software interrupt numbers 32 to 63, when the instruction is executed, the U flag does not change and the
SP selected at the time is used.
Interrupt Source
Undefined-instruction interrupt
Overflow interrupt
BRK interrupt
INT instruction interrupt
1
Interrupts
page 247 of 263
Address (L) to Address (H)
Vector Table Addresses
0FFDC
0FFEC
0FFE8
0FFFC
0FFE4
0FFF8
0FFE0
0FFF0
0FFF4
16
16
16
16
16
16
16
16
16
to 0FFEB
to 0FFF3
to 0FFF7
to 0FFFB
to 0FFE7
to 0FFFF
to 0FFE3
to 0FFEF
to 0FFDF
16
16
16
16
16
16
16
16
16
Interrupt generated by the UND instruction.
Interrupt generated by the INTO instruction.
Executed beginning from address indicated by vector in
variable vector table if 0FFE7
FF
Can be controlled by an interrupt enable bit.
Do not use this interrupt.
16
.
Description
16
address contents are
5.1 Outline of Interrupts