C8051F046-GQ Silicon Laboratories Inc, C8051F046-GQ Datasheet - Page 10

• Manufacturer Part Number: C8051F046-GQ
• Description: IC 8051 MCU 32K FLASH 100TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F04xr

Specifications of C8051F046-GQ

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 64
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Processor Series: C8051F0x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 4.25 KB
• Interface Type: CAN, SMBus, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 64
• Number Of Timers: 5
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F040DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 13 Channel
• On-chip Dac: 12 bit, 2 Channel
• Package: 100TQFP
• Device Core: 8051
• Family Name: C8051F04x
• Maximum Speed: 25 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 336-1211

C8051F040/1/2/3/4/5/6/7
7. 8-Bit ADC (ADC2, C8051F040/1/2/3 Only)
8. DACs, 12-Bit Voltage Mode (C8051F040/1/2/3 Only)
9. Voltage Reference (C8051F040/2/4/6)
10. Voltage Reference (C8051F041/3/5/7)
11. Comparators
12. CIP-51 Microcontroller
13. Reset Sources
14. Oscillators
15. Flash Memory
10
Figure 6.5. ADC0 Equivalent Input Circuits.............................................................. 78
Figure 6.6. Temperature Sensor Transfer Function ................................................. 79
Figure 6.7. ADC0 Data Word Example .................................................................... 83
Figure 6.8. 10-Bit ADC0 Window Interrupt Example: 
Figure 6.9. 10-Bit ADC0 Window Interrupt Example: 
Figure 6.10. 10-Bit ADC0 Window Interrupt Example: 
Figure 6.11. 10-Bit ADC0 Window Interrupt Example: Left Justified Differential Data .
Figure 7.1. ADC2 Functional Block Diagram............................................................ 91
Figure 7.2. ADC2 Track and Conversion Example Timing....................................... 93
Figure 7.3. ADC2 Equivalent Input Circuit................................................................ 94
Figure 7.4. ADC2 Data Word Example .................................................................... 99
Figure 7.5. ADC Window Compare Examples, Single-Ended Mode...................... 101
Figure 7.6. ADC Window Compare Examples, Differential Mode .......................... 102
Figure 8.1. DAC Functional Block Diagram............................................................ 105
Figure 9.1. Voltage Reference Functional Block Diagram ..................................... 113
Figure 10.1. Voltage Reference Functional Block Diagram.................................... 117
Figure 11.1. Comparator Functional Block Diagram .............................................. 121
Figure 11.2. Comparator Hysteresis Plot ............................................................... 122
Figure 12.1. CIP-51 Block Diagram........................................................................ 127
Figure 12.2. Memory Map ...................................................................................... 133
Figure 12.3. SFR Page Stack................................................................................. 136
Figure 12.4. SFR Page Stack While Using SFR Page 0x0F To Access Port 5...... 137
Figure 12.5. SFR Page Stack After ADC2 Window Comparator Interrupt Occurs . 138
Figure 12.6. SFR Page Stack Upon PCA Interrupt Occurring During an ADC2 ISR....
Figure 12.7. SFR Page Stack Upon Return From PCA Interrupt ........................... 140
Figure 12.8. SFR Page Stack Upon Return From ADC2 Window Interrupt ........... 141
Figure 13.1. Reset Sources.................................................................................... 165
Figure 13.2. Reset Timing ...................................................................................... 166
Figure 14.1. Oscillator Diagram.............................................................................. 173
Figure 14.2. 32.768 kHz External Crystal Example................................................ 177
Figure 15.1. Flash Program Memory Map and Security Bytes............................... 181
Right Justified Single-Ended Data ........................................................ 85
Right Justified Differential Data............................................................. 86
Left Justified Single-Ended Data........................................................... 87
88
139
Rev. 1.5