C8051F046-GQ Silicon Laboratories Inc, C8051F046-GQ Datasheet - Page 184

• Manufacturer Part Number: C8051F046-GQ
• Description: IC 8051 MCU 32K FLASH 100TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F04xr

Specifications of C8051F046-GQ

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 64
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Processor Series: C8051F0x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 4.25 KB
• Interface Type: CAN, SMBus, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 64
• Number Of Timers: 5
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F040DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 13 Channel
• On-chip Dac: 12 bit, 2 Channel
• Package: 100TQFP
• Device Core: 8051
• Family Name: C8051F04x
• Maximum Speed: 25 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 336-1211

C8051F040/1/2/3/4/5/6/7
184
Bits 7-0: FLACL: Flash Access Limit.
Bit7:
Bit6:
Bits5-1:
Bit0:
FOSE
R/W
R/W
Bit7
Bit7
This register holds the high byte of the 16-bit program memory read/write/erase limit
address. The entire 16-bit access limit address value is calculated as 0xNN00 where NN is
replaced by contents of FLACL. A write to this register sets the Flash Access Limit. This reg-
ister can only be written once after any reset. Any subsequent writes are ignored until the
next reset.
FOSE: Flash One-Shot Timer Enable
This is the timer that turns off the sense amps after a Flash read.
0: Flash One-Shot Timer disabled.
1: Flash One-Shot Timer enabled (recommended setting).
FRAE: Flash Read Always Enable
0: Flash reads occur as necessary (recommended setting).
1: Flash reads occur every system clock cycle.
RESERVED. Read = 00000b. Must Write 00000b.
FLWE: Flash Write/Erase Enable
This bit must be set to allow Flash writes/erases from user software.
0: Flash writes/erases disabled.
1: Flash writes/erases enabled.
FRAE
R/W
Bit6
R/W
Bit6
SFR Definition 15.2. FLSCL: Flash Memory Control
SFR Definition 15.1. FLACL: Flash Access Limit
Reserved Reserved Reserved Reserved Reserved
R/W
Bit5
R/W
Bit5
R/W
Bit4
R/W
Bit4
Rev. 1.5
R/W
Bit3
R/W
Bit3
R/W
Bit2
R/W
Bit2
R/W
Bit1
R/W
Bit1
SFR Address:
SFR Address:
SFR Page:
SFR Page:
FLWE
R/W
Bit0
R/W
Bit0
0xB7
F
SFR Address:
00000000
SFR Address:
0xB7
0
Reset Value
10000000
Reset Value