C8051F046-GQ Silicon Laboratories Inc, C8051F046-GQ Datasheet - Page 272

IC 8051 MCU 32K FLASH 100TQFP

C8051F046-GQ

Manufacturer Part Number
C8051F046-GQ
Description
IC 8051 MCU 32K FLASH 100TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F04xr
Datasheets

Specifications of C8051F046-GQ

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
64
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Processor Series
C8051F0x
Core
8051
Data Bus Width
8 bit
Data Ram Size
4.25 KB
Interface Type
CAN, SMBus, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
64
Number Of Timers
5
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F040DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
On-chip Dac
12 bit, 2 Channel
Package
100TQFP
Device Core
8051
Family Name
C8051F04x
Maximum Speed
25 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
336-1211

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F046-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Part Number:
C8051F046-GQR
Manufacturer:
AMAZING
Quantity:
67 000
Part Number:
C8051F046-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
C8051F040/1/2/3/4/5/6/7
21.5. Frame and Transmission Error Detection
All Modes:
The Transmit Collision bit (TXCOL0 bit in register SSTA0) reads '1' if user software writes data to the
SBUF0 register while a transmit is in progress.
Modes 1, 2, and 3:
The Receive Overrun bit (RXOV0 in register SSTA0) reads '1' if a new data byte is latched into the receive
buffer before software has read the previous byte. The Frame Error bit (FE0 in register SSTA0) reads '1' if
an invalid (low) STOP bit is detected.
272
RX
Master
Device
Figure 21.7. UART Multi-Processor Mode Interconnect Diagram
TX
RX
Device
Slave
TX
Rev. 1.5
RX
Device
Slave
TX
RX
Device
Slave
TX
+5V

Related parts for C8051F046-GQ