C8051F046-GQ Silicon Laboratories Inc, C8051F046-GQ Datasheet - Page 279

• Manufacturer Part Number: C8051F046-GQ
• Description: IC 8051 MCU 32K FLASH 100TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F04xr

Specifications of C8051F046-GQ

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 64
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Processor Series: C8051F0x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 4.25 KB
• Interface Type: CAN, SMBus, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 64
• Number Of Timers: 5
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F040DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 13 Channel
• On-chip Dac: 12 bit, 2 Channel
• Package: 100TQFP
• Device Core: 8051
• Family Name: C8051F04x
• Maximum Speed: 25 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 336-1211

22.2. Operational Modes
UART1 provides standard asynchronous, full duplex communication. The UART mode (8-bit or 9-bit) is
selected by the S1MODE bit (SCON1.7). Typical UART connection options are shown below.
22.2.1. 8-Bit UART
8-Bit UART mode uses a total of 10 bits per data byte: one start bit, eight data bits (LSB first), and one stop
bit. Data are transmitted LSB first from the TX1 pin and received at the RX1 pin. On receive, the eight data
bits are stored in SBUF1 and the stop bit goes into RB81 (SCON1.2).
Data transmission begins when software writes a data byte to the SBUF1 register. The TI1 Transmit Inter-
rupt Flag (SCON1.1) is set at the end of the transmission (the beginning of the stop-bit time). Data recep-
tion can begin any time after the REN1 Receive Enable bit (SCON1.4) is set to logic 1. After the stop bit is
received, the data byte will be loaded into the SBUF1 receive register if the following conditions are met:
RI1 must be logic 0, and if MCE1 is logic 1, the stop bit must be logic 1. In the event of a receive data over-
run, the first received 8 bits are latched into the SBUF1 receive register and the following overrun data bits
are lost.
If these conditions are met, the eight bits of data is stored in SBUF1, the stop bit is stored in RB81 and the
RI1 flag is set. If these conditions are not met, SBUF1 and RB81 will not be loaded and the RI1 flag will not
be set. An interrupt will occur if enabled when either TI1 or RI1 is set.
SPACE
MARK
BIT TIMES
BIT SAMPLING
START
BIT
Figure 22.3. UART Interconnect Diagram
D0
Figure 22.4. 8-Bit UART Timing Diagram
D1
RS-232
MCU
D2
TX
RX
Rev. 1.5
D3
RS-232
LEVEL
XLTR
OR
C8051F040/1/2/3/4/5/6/7
D4
RX
RX
TX
TX
C8051Fxxx
D5
C8051Fxxx
D6
D7
STOP
BIT
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