C8051F046-GQ Silicon Laboratories Inc, C8051F046-GQ Datasheet - Page 71

• Manufacturer Part Number: C8051F046-GQ
• Description: IC 8051 MCU 32K FLASH 100TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F04xr

Specifications of C8051F046-GQ

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 64
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Processor Series: C8051F0x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 4.25 KB
• Interface Type: CAN, SMBus, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 64
• Number Of Timers: 5
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F040DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 13 Channel
• On-chip Dac: 12 bit, 2 Channel
• Package: 100TQFP
• Device Core: 8051
• Family Name: C8051F04x
• Maximum Speed: 25 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 336-1211

Bits7-4:
Bit3:
Bit2:
Bit1:
Bit0:
NOTE:
Bits7-4:
Bits3-0:
Bit7
Bit7
R
R
-
-
UNUSED. Read = 0000b; Write = don’t care
PORT3IC: Port 3 even/odd Pin Input Pair Configuration Bit
0: Port 3 even and odd input channels are independent single-ended inputs
1: Port 3 even and odd input channels are (respectively) +, - differential input pair
HVDA2C: HVDA 2’s Compliment Bit
0: HVDA output measured as an independent single-ended input
1: 2’s compliment value Result from HVDA
AIN23IC: AIN2, AIN3 Input Pair Configuration Bit
0: AIN2 and AIN3 are independent single-ended inputs
1: AIN2, AIN3 are (respectively) +, - differential input pair
AIN01IC: AIN0, AIN1 Input Pair Configuration Bit
0: AIN0 and AIN1 are independent single-ended inputs
1: AIN0, AIN1 are (respectively) +, - differential input pair
The ADC0 Data Word is in 2’s complement format for channels configured as differential.
UNUSED. Read = 0000b; Write = don’t care
AMX0AD3-0: AMX0 Address Bits
0000-1111b: ADC Inputs selected per Table 6.1.
Bit6
Bit6
R
R
-
-
SFR Definition 6.2. AMX0SL: AMUX0 Channel Select
SFR Definition 6.1. AMX0CF: AMUX0 Configuration
Bit5
Bit5
R
R
-
-
Bit4
Bit4
R
R
-
-
AMX0AD3 AMX0AD2 AMX0AD1 AMX0AD0 00000000
PORT3IC HVDA2C
Rev. 1.5
R/W
R/W
Bit3
Bit3
C8051F040/1/2/3/4/5/6/7
R/W
R/W
Bit2
Bit2
AIN23IC
R/W
R/W
Bit1
Bit1
SFR Address:
SFR Address:
AIN01IC
SFR Page:
SFR Page:
R/W
R/W
Bit0
Bit0
0xBA
0
0xBB
0
SFR Address:
Reset Value
00000000
Reset Value
71