MC9S12D64MFUE Freescale Semiconductor, MC9S12D64MFUE Datasheet - Page 61

IC MCU 64K FLASH 25MHZ 80-QFP

MC9S12D64MFUE

Manufacturer Part Number
MC9S12D64MFUE
Description
IC MCU 64K FLASH 25MHZ 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12D64MFUE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
PWM, WDT
Number Of I /o
59
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.25 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
80-QFP
Processor Series
S12D
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
49
Number Of Timers
8
Operating Supply Voltage
4.5 V to 5.25 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68KIT912DP256
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (8-ch x 10-bit)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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48
MC9S12DJ64 Device User Guide — V01.20
2.3.30 PJ6 / KWJ6 / SDA / RXCAN0 — PORT J I/O Pin 6
PJ6 is a general purpose input or output pin. It can be configured to generate an interrupt causing the MCU
to exit STOP or WAIT mode. It can be configured as the serial data pin SDA of the IIC module. It can be
configured as the receive pin RXCAN of the Freescale Scalable Controller Area Network controller 0
(CAN0).
2.3.31 PJ[1:0] / KWJ[1:0] — Port J I/O Pins [1:0]
PJ1 and PJ0 are general purpose input or output pins. They can be configured to generate an interrupt
causing the MCU to exit STOP or WAIT mode.
2.3.32 PK7 / ECS / ROMCTL — Port K I/O Pin 7
PK7 is a general purpose input or output pin. During MCU expanded modes of operation, this pin is used
as the emulation chip select output (ECS). During MCU expanded modes of operation, this pin is used to
enable the Flash EEPROM memory in the memory map (ROMCTL). At the rising edge of RESET, the
state of this pin is latched to the ROMON bit. For a complete list of modes refer to 4.2 Chip Configuration
Summary.
2.3.33 PK[5:0] / XADDR[19:14] — Port K I/O Pins [5:0]
PK5-PK0 are general purpose input or output pins. In MCU expanded modes of operation, these pins
provide the expanded address XADDR[19:14] for the external bus.
2.3.34 PM7 — Port M I/O Pin 7
PM7 is a general purpose input or output pin.
2.3.35 PM6 — Port M I/O Pin 6
PM6 is a general purpose input or output pin.
2.3.36 PM5 / TXCAN0 / SCK0 — Port M I/O Pin 5
PM5 is a general purpose input or output pin. It can be configured as the transmit pin TXCAN of the
Freescale Scalable Controller Area Network controller 0 (CAN0). It can be configured as the serial clock
pin SCK of the Serial Peripheral Interface 0 (SPI0).
2.3.37 PM4 / RXCAN0 / MOSI0 — Port M I/O Pin 4
PM4 is a general purpose input or output pin. It can be configured as the receive pin RXCAN of the
Freescale Scalable Controller Area Network controller 0 (CAN0). It can be configured as the master output
(during master mode) or slave input pin (during slave mode) MOSI for the Serial Peripheral Interface 0
(SPI0).
61

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