M30626FJPFP#U5C Renesas Electronics America, M30626FJPFP#U5C Datasheet - Page 119

• Manufacturer Part Number: M30626FJPFP#U5C
• Description: IC M16C MCU FLASH 512K 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30626FJPFP#U5C

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: I²C, IEBus, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 31K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-QFP
• For Use With: 867-1000 - KIT QUICK START RENESAS 62PR0K33062PS001BE - R0K33062P STARTER KITR0K33062PS000BE - KIT EVAL STARTER FOR M16C/62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

OR
[ Syntax ]
[ Operation ]
[ Function ]
[ Selectable src/dest ]
[ Description Example ]
[ Related Instructions ]
[ Flag Change ]
Chapter 3 Functions
*1 If you specify (.B) for the size specifier (.size), you cannot choose A0 or A1 for src and dest simulta-
Change
Conditions
R0L/R0
A0/A0
dsp:8[A0]
dsp:16[A0] dsp:16[A1]
dsp:20[A0] dsp:20[A1]
R2R0
Flag
OR.size (:format) src,dest
dest
• This instruction logically ORs dest and src together and stores the result in dest .
• If dest is an A0 or A1 when the size specifier (.size) you selected is (.B), src is zero-expanded to
S :
Z :
OR.B
OR.B:G
OR.B:G
OR.B:S
neously.
perform operation in 16 bits. If src is an A0 or A1, operation is performed on the 8 low-order bits of A0
or A1.
*1
U
The flag is set when the operation resulted in MSB = 1; otherwise cleared.
The flag is set when the operation resulted in 0; otherwise cleared.
src
R0H/R1
A1/A1
dsp:8[A1]
R3R1
I
Ram:8[SB],R0L
A0,R0L
R0L,A0
#3,R0L
O
*1
dest
B
src
R1L/R2
[A0]
dsp:8[SB]
dsp:16[SB]
abs20
A1A0
S
AND,XOR,TST
Z
D
R1H/R3
[A1]
dsp:8[FB] dsp:8[A0]
abs16
#IMM
C
(See the next page for src / dest classified by format.)
G , S (Can be specified)
B , W
Logically OR
OR
101
R0L/R0
A0/A0
dsp:16[A0] dsp:16[A1] dsp:16[SB] abs16
dsp:20[A0] dsp:20[A1] abs20
R2R0
; A0’s 8 low-order bits and R0L are ORed.
; R0L is zero-expanded and ORed with A0.
*1
R0H/R1
A1/A1
dsp:8[A1]
R3R1
[ Instruction Code/Number of Cycles ]
*1
dest
R1L/R2
[A0]
dsp:8[SB]
A1A0
R1H/R3
[A1]
dsp:8[FB]
SP/SP
3.2
Page=
Functions
OR
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