M30626FJPFP#U5C Renesas Electronics America, M30626FJPFP#U5C Datasheet - Page 37

IC M16C MCU FLASH 512K 100QFP

M30626FJPFP#U5C

Manufacturer Part Number
M30626FJPFP#U5C
Description
IC M16C MCU FLASH 512K 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheets

Specifications of M30626FJPFP#U5C

Core Processor
M16C/60
Core Size
16-Bit
Speed
24MHz
Connectivity
I²C, IEBus, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
31K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-QFP
For Use With
867-1000 - KIT QUICK START RENESAS 62PR0K33062PS001BE - R0K33062P STARTER KITR0K33062PS000BE - KIT EVAL STARTER FOR M16C/62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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1.10 Vector Table
Chapter 1 Overview
The vector table comes in two types: a special page vector table and an interrupt vector table. The special
page vector table is a fixed vector table. The interrupt vector table can be a fixed or a variable vector table.
Figure 1.10.1 Fixed vector table
1.10.1 Fixed Vector Table
The fixed vector table is an address-fixed vector table. The special page vector table is allocated to
addresses FFE00
FFFDC
The special page vector table is comprised of two bytes per table. Each vector table must contain the 16
low-order bits of the subroutine’s entry address. Each vector table has special page numbers (18 to
255) which are used in JSRS and JMPS instructions.
The interrupt vector table is comprised of four bytes per table. Each vector table must contain the
interrupt handler routine’s entry address.
FFE00
FFE02
FFFDB
FFFDC
FFFFF
16
through FFFFF
16
16
16
16
16
16
through FFFDB
Special page
vector table
Interrupt
vector table
16
. Figure 1.10.1 shows a fixed vector table.
16
, and part of the interrupt vector table is allocated to addresses
255
254
18
19
FFFDC
FFFE0
FFFE4
FFFE8
FFFEC
FFFF0
FFFF4
FFFF8
FFFFC
Special page number
16
16
16
16
16
16
16
16
16
Undefined instruction
Overflow
BRK instruction
Address match
Single step
Watchdog timer
DBC
NMI
Reset
1.10 Vector Table

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