M30626FJPGP#U3C Renesas Electronics America, M30626FJPGP#U3C Datasheet - Page 125

• Manufacturer Part Number: M30626FJPGP#U3C
• Description: IC M16C MCU FLASH 512K 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30626FJPGP#U3C

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: I²C, IEBus, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 31K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: 867-1000 - KIT QUICK START RENESAS 62PR0K33062PS001BE - R0K33062P STARTER KITR0K33062PS000BE - KIT EVAL STARTER FOR M16C/62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M16C/62P Group (M16C/62P, M16C/62PT)
Rev.2.41
REJ09B0185-0241
12.3
12.3.1
12.3.2
Hardware interrupts are classified into two types − special interrupts and peripheral function interrupts.
12.3.1.1
12.3.1.2
12.3.1.3
12.3.1.4
12.3.1.5
12.3.1.6
12.3.1.7
Special interrupts are non-maskable interrupts.
An NMI interrupt is generated when input on the NMI pin changes state from high to low. For details about the
NMI interrupt, refer to the 12.7 NMI Interrupt.
Do not normally use this interrupt because it is provided exclusively for use by development tools.
Generated by the watchdog timer. Once a watchdog timer interrupt is generated, be sure to initialize the
watchdog timer. For details about the watchdog timer, refer to the 13. Watchdog Timer.
Generated by the oscillation stop and re-oscillation detection function. For details about the oscillation stop and
re-oscillation detection function, refer to the 10. Clock Generation Circuit.
Generated by the voltage detection circuit. For details about the voltage detection circuit, refer to the 6. Voltage
Detection Circuit.
Do not normally use this interrupt because it is provided exclusively for use by development tools.
An address match interrupt is generated immediately before executing the instruction at the address indicated
by the RMAD0 to RMAD3 register that corresponds to one of the AIER0 or AIER1 bit in the AIER register or
the AIER20 or AIER21 bit in the AIER2 register which is “1” (address match interrupt enabled). For details
about the address match interrupt, refer to the 12.9 Address Match Interrupt.
The peripheral function interrupt occurs when a request from the peripheral functions in the microcomputer is
acknowledged. The peripheral function interrupt is a maskable interrupt. See Table 12.2 Relocatable Vector
Tables about how the peripheral function interrupt occurs. Refer to the descriptions of each function for details.
Hardware Interrupts
Jan 10, 2006
Special Interrupts
Peripheral Function Interrupts
DBC Interrupt
Watchdog Timer Interrupt
Oscillation Stop and Re-oscillation Detection Interrupt
12.3.1.5 Low Voltage Detection Interrupt
Single-Step Interrupt
Address Match Interrupt
NMI Interrupt
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12. Interrupt