M30626FJPGP#U3C Renesas Electronics America, M30626FJPGP#U3C Datasheet - Page 242

• Manufacturer Part Number: M30626FJPGP#U3C
• Description: IC M16C MCU FLASH 512K 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30626FJPGP#U3C

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: I²C, IEBus, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 31K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: 867-1000 - KIT QUICK START RENESAS 62PR0K33062PS001BE - R0K33062P STARTER KITR0K33062PS000BE - KIT EVAL STARTER FOR M16C/62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M16C/62P Group (M16C/62P, M16C/62PT)
Rev.2.41
REJ09B0185-0241
Figure 17.35
Figure 17.36
17.1.6.1
The parity error signal is enabled by setting the U2ERE bit in the U2C1 register to “1”.
The parity error signal is output when a parity error is detected while receiving data. This is achieved by pulling
the TXD2 output low with the timing shown in Figure 17.36. If the R2RB register is read while outputting a
parity error signal, the PER bit is cleared to “0” and at the same time the TXD2 output is returned high.
When transmitting, a transmission-finished interrupt request is generated at the falling edge of the transfer clock
pulse that immediately follows the stop bit. Therefore, whether a parity signal has been returned can be
determined by reading the port that shares the RXD2 pin in a transmission-finished interrupt routine.
IR bit in U2C1
NOTES :
This timing diagram applies to the case where the direct format is
implemented.
Jan 10, 2006
1. The output of microcomputer is in the high-impedance state
Transfer
register
(pulled up externally).
RXD2
TXD2
Parity Error Signal Output
Parity Error Signal Output Timing
SIM Interface Connection
clock
Microcomputer
“H”
“H”
“H”
“L”
“L”
“L”
“1”
“0”
Page 225 of 390
RXD2
TXD2
ST
D0
D1
D2
D3
(NOTE 1)
D4
D5
D6
SIM card
D7
P
SP
ST : Start bit
P : Even Parity
SP : Stop bit
17. Serial Interface