M30626FJPGP#U3C Renesas Electronics America, M30626FJPGP#U3C Datasheet - Page 290

• Manufacturer Part Number: M30626FJPGP#U3C
• Description: IC M16C MCU FLASH 512K 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30626FJPGP#U3C

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: I²C, IEBus, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 31K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: 867-1000 - KIT QUICK START RENESAS 62PR0K33062PS001BE - R0K33062P STARTER KITR0K33062PS000BE - KIT EVAL STARTER FOR M16C/62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M16C/62P Group (M16C/62P, M16C/62PT)
Rev.2.41
REJ09B0185-0241
22.2
22.1.1
22.2.1
22.2.2
The flash memory has a built-in ROM code protect function for parallel I/O mode and a built-in ID code check
function for standard I/O mode to prevent the flash memory from reading or rewriting.
The microcomputer enters boot mode when a hardware reset occurs while an “H” signal is applied to the
CNVSS and P5_0 pins and an “L” signal is applied to the P5_5 pin. A program in the boot ROM area is
executed.
In boot mode, the FMR05 bit in the FMR0 register selects access to the boot ROM area or the user ROM area.
The rewrite control program for standard serial I/O mode is stored in the boot ROM area before shipment.
The boot ROM area can be rewritten in parallel I/O mode only. If any rewrite control program using erase-write
mode (EW0 mode) is written in the boot ROM area, the flash memory can be rewritten according to the system
implemented.
The ROM code protect function inhibits the flash memory from being read or rewritten during parallel input/
output mode. Figure 22.2 shows the ROMCP Register. The ROMCP register is located in the user ROM area.
The ROM code protect function is enabled when the ROMCR bits are set to other than “11b”. In this case, set
the bit 5 to bit 0 to “111111b”.
When exiting ROM code protect, erase the block including the ROMCP1 register by the CPU rewrite mode or
the standard serial I/O mode.
Use the ID code check function in standard serial I/O mode. The ID code sent from the serial programmer is
compared with the ID code written in the flash memory for a match. If the ID codes do not match, commands
sent from the serial programmer are not accepted. However, if the four bytes of the reset vector are
“FFFFFFFFh”, ID codes are not compared, allowing all commands to be accepted.
The ID codes are 7-byte data stored consecutively, starting with the first byte, into addresses 0FFFDFh,
0FFFE3h, 0FFFEBh, 0FFFEFh, 0FFFF3h, 0FFFF7h, and 0FFFFBh. The flash memory must have a program
with the ID codes set in these addresses.
Functions To Prevent Flash Memory from Rewriting
Jan 10, 2006
Boot Mode
ROM Code Protect Function
ID Code Check Function
Page 273 of 390
22. Flash Memory Version