M30626FJPGP#U3C Renesas Electronics America, M30626FJPGP#U3C Datasheet - Page 306

• Manufacturer Part Number: M30626FJPGP#U3C
• Description: IC M16C MCU FLASH 512K 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30626FJPGP#U3C

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: I²C, IEBus, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 31K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: 867-1000 - KIT QUICK START RENESAS 62PR0K33062PS001BE - R0K33062P STARTER KITR0K33062PS000BE - KIT EVAL STARTER FOR M16C/62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M16C/62P Group (M16C/62P, M16C/62PT)
Rev.2.41
REJ09B0185-0241
Figure 22.12
22.3.5.6
22.3.5.7
The erase all unlocked block command erases all blocks except the block A.
By writing “xxA7h” in the first bus cycle and “xxD0h” in the second bus cycle, an auto erase (erase and verify)
operation will run continuously in all blocks except the block A.
The FMR00 bit in the FMR0 register indicates whether an auto erase operation has been completed.
After the completion of an auto erase operation, the FMR07 bit in the FMR0 register indicates whether or not
the auto erase operation has been completed as expected.
The lock bit can protect each block from being programmed inadvertently. (Refer to 22.3.6 Data Protect
Function.)
In EW1 mode, do not execute this command when the lock bit for any block storing the rewrite control program
is set to “1” (unlocked) or when the FMR02 bit in the FMR0 register is set to “1” (lock bit disabled).
In EW0 mode, the microcomputer enters read status register mode as soon as an auto erase operation starts. The
status register can be read. The SR7 bit in the status register is set to “0” (busy) at the same time an auto erase
operation starts. It is set to “1” (ready) when an auto erase operation is completed. The microcomputer remains
in read status register mode until the read array command or read lock bit status command is written.
Only blocks 0 to 12 can be erased by the erase all unlocked block command. The block A cannot be erased. Use
the block erase command to erase the block A.
The lock bit program command sets the lock bit for a specified block to “0” (locked).
By writing “xx77h” in the first bus cycle and “xxD0h” to the highest-order even address of a block in the
second bus cycle, the lock bit for the specified block is set to “0”. The address value specified in the first bus
cycle must be the same highest-order even address of a block specified in the second bus cycle.
Figure 22.12 shows a Flow Chart of the Lock Bit Program Command Programming. Execute read lock bit
status command to read lock bit state (lock bit data).
The FMR00 bit in the FMR0 register indicates whether a lock bit program operation is completed.
Refer to 22.3.6 Data Protect Function for details on lock bit functions and how to set it to “1” (unlocked).
Jan 10, 2006
Erase All Unlocked Block
Lock Bit Program Command
Lock Bit Program Command
NOTES:
Page 289 of 390
1. Write the command code and data to even addresses.
Write the command code “xx77h” to
Write “xxD0h” to the highest-order
the highest-order block address
Lock bit program operation
Full status check
block address
is completed
FMR00=1?
Start
YES
NO
22. Flash Memory Version