M30626FJPGP#U3C Renesas Electronics America, M30626FJPGP#U3C Datasheet - Page 310

• Manufacturer Part Number: M30626FJPGP#U3C
• Description: IC M16C MCU FLASH 512K 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30626FJPGP#U3C

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: I²C, IEBus, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 31K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: 867-1000 - KIT QUICK START RENESAS 62PR0K33062PS001BE - R0K33062P STARTER KITR0K33062PS000BE - KIT EVAL STARTER FOR M16C/62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M16C/62P Group (M16C/62P, M16C/62PT)
Rev.2.41
REJ09B0185-0241
22.3.8
Table 22.6
NOTES:
FMR07 bit
(SR5 bit)
(Status Register) State
1. The flash memory enters read array mode by writing command code “xxFFh” in the second bus
2. When the FMR02 bit is set to “1” (lock bit disabled), no error occurs even under the conditions
If an error occurs when a program or erase operation is completed, the FMR06 to FMR07 bits in the FMR0
register are set to “1”, indicating a specific error. Therefore, execution results can be confirmed by checking
these bits (full status check).
Table 22.6 lists Errors and FMR0 Register State. Figure 22.14 shows a flow chart of the Full Status Check and
Handling Procedure for Each Error.
FMR00 Register
1
1
0
cycle of these commands. The command code written in the first bus cycle becomes invalid.
above.
Jan 10, 2006
Full Status Check
Errors and FMR0 Register State
FMR06 bit
(SR4 bit)
1
0
1
Page 293 of 390
Command
Sequence error
Erase error
Program error
Error
• Command is written incorrectly
• A value other than “xxD0h” or “xxFFh” is written in the
• The block erase command is executed on a locked block
• The block erase or erase all unlocked block command is
• The program command is executed on locked blocks
• The program command is executed on unlocked blocks
• The lock bit program command is executed but program
second bus cycle of the lock bit program, block erase or
erase all unlocked block command
executed on an unlock block and auto erase operation is
not completed as expected
but program operation is not completed as expected
operation is not completed as expected
Error Occurrence Conditions
(2)
22. Flash Memory Version
(1)
(2)