SAB-C167CR-LM HA+ Infineon Technologies, SAB-C167CR-LM HA+ Datasheet - Page 15

• Manufacturer Part Number: SAB-C167CR-LM HA+
• Description: IC MCU 16BIT MQFP-144
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAB-C167CR-LM HA+

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 144- BSQFP
• Data Bus Width: 16 bit
• Data Ram Size: 4 KB
• Interface Type: 1xUSART, 1xSSC
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 111
• Number Of Timers: 9
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 16 Channel
• Packages: PG-MQFP-144
• Max Clock Frequency: 25.0 MHz
• Sram (incl. Cache): 4.0 KByte
• Can Nodes: 1
• A / D Input Lines (incl. Fadc): 16
• Program Memory: 0.0 KByte
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: B167CRLMHAZNP; B167CRLMHAZXP; SAB-C167CR-LMHA; SAB-C167CR-LMHA+; SAB-C167CR-LMHA; SAB-C167CR-LMHAIN; SABC167CRLM-HA; SABC167CRLM-HA; SABC167CRLMHAX; SP000103462

Table 2
Symbol Pin
P4
P4.0
P4.1
P4.2
P4.3
P4.4
P4.5
P4.6
P4.7
RD
WR/
WRL
READY 97
ALE
EA
Data Sheet
No.
85
86
87
88
89
90
91
92
95
96
98
99
Pin Definitions and Functions P-MQFP-144-8 (cont’d)
Input
Outp.
IO
O
O
O
O
O
O
I
O
O
O
O
O
I
O
I
Function
Port 4 is an 8-bit bidirectional I/O port. It is bit-wise
programmable for input or output via direction bits. For a pin
configured as input, the output driver is put into high-
impedance state.
Port 4 can be used to output the segment address lines and
for serial bus interfaces:
A16
A17
A18
A19
A20
A21
CAN1_RxD CAN 1 Receive Data Input
A22
CAN1_TxD CAN 1 Transmit Data Output
A23
External Memory Read Strobe. RD is activated for every
external instruction or data read access.
External Memory Write Strobe. In WR-mode this pin is
activated for every external data write access. In WRL-mode
this pin is activated for low byte data write accesses on a
16-bit bus, and for every data write access on an 8-bit bus.
See WRCFG in register SYSCON for mode selection.
Ready Input. When the Ready function is enabled, a high
level at this pin during an external memory access will force
the insertion of memory cycle time waitstates until the pin
returns to a low level.
An internal pull-up device will hold this pin high when nothing
is driving it.
Address Latch Enable Output. Can be used for latching the
address into external memory or an address latch in the
multiplexed bus modes.
External Access Enable pin. A low level at this pin during and
after Reset forces the C167CR to begin instruction execution
out of external memory. A high level forces execution out of
the internal program memory.
“ROMless” versions must have this pin tied to ‘0’.
Least Significant Segment Address Line
Segment Address Line
Segment Address Line
Segment Address Line
Segment Address Line
Segment Address Line,
Segment Address Line,
Most Significant Segment Address Line
13
General Device Information
V3.3, 2005-02
C167CR
C167SR