SAB-C167CR-LM HA+ Infineon Technologies, SAB-C167CR-LM HA+ Datasheet - Page 22

IC MCU 16BIT MQFP-144

SAB-C167CR-LM HA+

Manufacturer Part Number
SAB-C167CR-LM HA+
Description
IC MCU 16BIT MQFP-144
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet

Specifications of SAB-C167CR-LM HA+

Core Processor
C166
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
144- BSQFP
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
1xUSART, 1xSSC
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
111
Number Of Timers
9
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 16 Channel
Packages
PG-MQFP-144
Max Clock Frequency
25.0 MHz
Sram (incl. Cache)
4.0 KByte
Can Nodes
1
A / D Input Lines (incl. Fadc)
16
Program Memory
0.0 KByte
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details
Other names
B167CRLMHAZNP
B167CRLMHAZXP
SAB-C167CR-LMHA
SAB-C167CR-LMHA+
SAB-C167CR-LMHA
SAB-C167CR-LMHAIN
SABC167CRLM-HA
SABC167CRLM-HA
SABC167CRLMHAX
SP000103462
Table 3
Symbol Pin
XTAL2
XTAL1
RST
OUT
RSTIN
Data Sheet
Num.
D13
C13
D12
E11
Pin Definitions and Functions P-BGA-176-2 (cont’d)
Input
Outp.
O
I
O
I/O
Function
XTAL2:
XTAL1:
To clock the device from an external source, drive XTAL1,
while leaving XTAL2 unconnected. Minimum and maximum
high/low and rise/fall times specified in the AC
Characteristics must be observed.
Internal Reset Indication Output. This pin is set to a low level
when the part is executing either a hardware-, a software- or
a watchdog timer reset. RSTOUT remains low until the EINIT
(end of initialization) instruction is executed.
Reset Input with Schmitt-Trigger characteristics. A low level
at this pin while the oscillator is running resets the C167CR.
An internal pull-up resistor permits power-on reset using only
a capacitor connected to
A spike filter suppresses input pulses < 10 ns. Input pulses
> 100 ns safely pass the filter. The minimum duration for a
safe recognition should be 100 ns + 2 CPU clock cycles.
In bidirectional reset mode (enabled by setting bit BDRSTEN
in register SYSCON) the RSTIN line is internally pulled low
for the duration of the internal reset sequence upon any reset
(HW, SW, WDT). See note below this table.
Note: To let the reset configuration of PORT0 settle and to let
the PLL lock a reset duration of ca. 1 ms is
recommended.
Output of the oscillator amplifier circuit.
Input to the oscillator amplifier and input to the
internal clock generator.
20
V
SS
.
General Device Information
V3.3, 2005-02
C167CR
C167SR

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