SAB-C167CR-LM HA+ Infineon Technologies, SAB-C167CR-LM HA+ Datasheet - Page 6

IC MCU 16BIT MQFP-144

SAB-C167CR-LM HA+

Manufacturer Part Number
SAB-C167CR-LM HA+
Description
IC MCU 16BIT MQFP-144
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet

Specifications of SAB-C167CR-LM HA+

Core Processor
C166
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
144- BSQFP
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
1xUSART, 1xSSC
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
111
Number Of Timers
9
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 16 Channel
Packages
PG-MQFP-144
Max Clock Frequency
25.0 MHz
Sram (incl. Cache)
4.0 KByte
Can Nodes
1
A / D Input Lines (incl. Fadc)
16
Program Memory
0.0 KByte
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details
Other names
B167CRLMHAZNP
B167CRLMHAZXP
SAB-C167CR-LMHA
SAB-C167CR-LMHA+
SAB-C167CR-LMHA
SAB-C167CR-LMHAIN
SABC167CRLM-HA
SABC167CRLM-HA
SABC167CRLMHAX
SP000103462
16-Bit Single-Chip Microcontroller
C166 Family
1
Data Sheet
High Performance 16-bit CPU with 4-Stage Pipeline
– 80/60 ns Instruction Cycle Time at 25/33 MHz CPU Clock
– 400/303 ns Multiplication (16 × 16 bits), 800/606 ns Division (32 / 16 bits)
– Enhanced Boolean Bit Manipulation Facilities
– Additional Instructions to Support HLL and Operating Systems
– Register-Based Design with Multiple Variable Register Banks
– Single-Cycle Context Switching Support
– 16 Mbytes Total Linear Address Space for Code and Data
– 1024 Bytes On-Chip Special Function Register Area
16-Priority-Level Interrupt System with 56 Sources, Sample-Rate down to 40/30 ns
8-Channel Interrupt-Driven Single-Cycle Data Transfer Facilities via
Peripheral Event Controller (PEC)
Clock Generation via on-chip PLL (factors 1:1.5/2/2.5/3/4/5),
via prescaler or via direct clock input
On-Chip Memory Modules
– 2 Kbytes On-Chip Internal RAM (IRAM)
– 2 Kbytes On-Chip Extension RAM (XRAM)
– 128/32 Kbytes On-Chip Mask ROM
On-Chip Peripheral Modules
– 16-Channel 10-bit A/D Converter with Programmable Conversion Time
– Two 16-Channel Capture/Compare Units
– 4-Channel PWM Unit
– Two Multi-Functional General Purpose Timer Units with 5 Timers
– Two Serial Channels (Synchronous/Asynchronous and
– On-Chip CAN Interface (Rev. 2.0B active) with 15 Message Objects
Up to 16 Mbytes External Address Space for Code and Data
– Programmable External Bus Characteristics for Different Address Ranges
– Multiplexed or Demultiplexed External Address/Data Buses with 8-Bit or 16-Bit
– Five Programmable Chip-Select Signals
– Hold- and Hold-Acknowledge Bus Arbitration Support
Idle and Power Down Modes
Programmable Watchdog Timer and Oscillator Watchdog
down to 7.8 µs
High-Speed-Synchronous)
(Full CAN / Basic CAN)
Data Bus Width
Summary of Features
4
C167CR/C167SR
V3.3, 2005-02

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