IC ENCORE MCU FLASH 2K 28SOIC

 

Z8F0213SJ005EC

Manufacturer Part NumberZ8F0213SJ005EC
DescriptionIC ENCORE MCU FLASH 2K 28SOIC
ManufacturerZilog
SeriesEncore!® XP®
Z8F0213SJ005EC datasheets

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Warranty: 60 days

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Specifications of Z8F0213SJ005EC

Core ProcessorZ8Core Size8-Bit
Speed5MHzConnectivityIrDA, UART/USART
PeripheralsBrown-out Detect/Reset, LED, POR, PWM, WDTNumber Of I /o24
Program Memory Size2KB (2K x 8)Program Memory TypeFLASH
Ram Size512 x 8Voltage - Supply (vcc/vdd)2.7 V ~ 3.6 V
Oscillator TypeInternalOperating Temperature-40°C ~ 105°C
Package / Case28-SOIC (7.5mm Width)Lead Free Status / RoHS StatusContains lead / RoHS non-compliant
Eeprom Size-Data Converters-
Other names269-3464  
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PSEL—Parity Select
0 = Even parity is transmitted and expected on all received data
1 = Odd parity is transmitted and expected on all received data
SBRK—Send Break
This bit pauses or breaks data transmission. Sending a break interrupts any transmission in
progress, so ensure that the transmitter has finished sending data before setting this bit.
0 = No break is sent
1 = Forces a break condition by setting the output of the transmitter to zero
STOP—Stop Bit Select
0 = The transmitter sends one stop bit
1 = The transmitter sends two stop bits
LBEN—Loop Back Enable
0 = Normal operation
1 = All transmitted data is looped back to the receiver
Table 67. UART Control 1 Register (U0CTL1)
BITS
7
6
MPMD[1]
MPEN
FIELD
0
0
RESET
R/W
R/W
R/W
ADDR
MPMD[1:0]—MULTIPROCESSOR Mode
If MULTIPROCESSOR (9-bit) mode is enabled,
00 = The UART generates an interrupt request on all received bytes (data and address)
01 = The UART generates an interrupt request only on received address bytes
10 = The UART generates an interrupt request when a received address byte matches the
value stored in the Address Compare Register and on all successive data bytes until an
address mismatch occurs
11 = The UART generates an interrupt request on all received data bytes for which the
most recent address byte matched the value in the Address Compare Register
MPEN—MULTIPROCESSOR (9-bit) Enable
This bit is used to enable MULTIPROCESSOR (9-bit) mode.
0 = Disable MULTIPROCESSOR (9-bit) mode
1 = Enable MULTIPROCESSOR (9-bit) mode
MPBT—Multiprocessor Bit Transmit
This bit is applicable only when MULTIPROCESSOR (9-bit) mode is enabled. The 9th bit
is used by the receiving device to determine if the data byte contains address or data infor-
mation.
PS024314-0308
5
4
3
MPMD[0]
MPBT
DEPOL
0
0
0
R/W
R/W
R/W
F43H
Universal Asynchronous Receiver/Transmitter
®
Z8 Encore! XP
F0823 Series
Product Specification
2
1
0
BRGCTL
RDAIRQ
IREN
0
0
0
R/W
R/W
R/W
108