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Z8F0213SJ005EC
Z8F0213SJ005EC | |
|---|---|
| Manufacturer Part Number | Z8F0213SJ005EC |
| Description | IC ENCORE MCU FLASH 2K 28SOIC |
| Manufacturer | Zilog |
| Series | Encore!® XP® |
| Z8F0213SJ005EC datasheets |
|
Availability: By request
International delivery:
Warranty: 60 days
×
- We provide standard 60-days warranty for all parts. If warranty differs we always mention it beforehand. In case of return we cover shipping costs.
- If you still have any questions - please contact us
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Shipping terms
- Standard delivery time differs from 5-8 business days if the supplier is a local one to 12-14 days if the suplier is from overseas. If delivery time differs it's always mentioned in our quotation.
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- If you still have any questions - please contact us
Specifications of Z8F0213SJ005EC | |||
|---|---|---|---|
| Core Processor | Z8 | Core Size | 8-Bit |
| Speed | 5MHz | Connectivity | IrDA, UART/USART |
| Peripherals | Brown-out Detect/Reset, LED, POR, PWM, WDT | Number Of I /o | 24 |
| Program Memory Size | 2KB (2K x 8) | Program Memory Type | FLASH |
| Ram Size | 512 x 8 | Voltage - Supply (vcc/vdd) | 2.7 V ~ 3.6 V |
| Oscillator Type | Internal | Operating Temperature | -40°C ~ 105°C |
| Package / Case | 28-SOIC (7.5mm Width) | Lead Free Status / RoHS Status | Contains lead / RoHS non-compliant |
| Eeprom Size | - | Data Converters | - |
| Other names | 269-3464 | ||
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Interrupt Request 1 Register
The Interrupt Request 1 (IRQ1) register
vectored and polled interrupts. When a request is presented to the interrupt controller, the
corresponding bit in the IRQ1 register becomes 1. If interrupts are globally enabled
(vectored interrupts), the interrupt controller passes an interrupt request to the eZ8 CPU. If
interrupts are globally disabled (polled interrupts), the eZ8 CPU reads the Interrupt
Request 1 register to determine if any interrupt requests are pending.
Table 35. Interrupt Request 1 Register (IRQ1)
BITS
7
6
PA7VI
PA6CI
FIELD
0
0
RESET
R/W
R/W
R/W
ADDR
PA7VI—Port A7 Interrupt Request
0 = No interrupt request is pending for GPIO Port A
1 = An interrupt request from GPIO Port A
PA6CI—Port A6 or Comparator Interrupt Request
0 = No interrupt request is pending for GPIO Port A or Comparator
1 = An interrupt request from GPIO Port A or Comparator
PAxI—Port A Pin x Interrupt Request
0 = No interrupt request is pending for GPIO Port A pin x
1 = An interrupt request from GPIO Port A pin x is awaiting service
where x indicates the specific GPIO Port pin number (0–5)
Interrupt Request 2 Register
The Interrupt Request 2 (IRQ2) register
vectored and polled interrupts. When a request is presented to the interrupt controller, the
corresponding bit in the IRQ2 register becomes 1. If interrupts are globally enabled (vec-
tored interrupts), the interrupt controller passes an interrupt request to the eZ8 CPU. If
interrupts are globally disabled (polled interrupts), the eZ8 CPU can read the Interrupt
Request 2 register to determine if any interrupt requests are pending.
PS024314-0308
(Table
35) stores interrupt requests for both
5
4
3
PA5I
PA4I
PA3I
0
0
0
R/W
R/W
R/W
FC3H
(Table
36) stores interrupt requests for both
®
Z8 Encore! XP
F0823 Series
Product Specification
2
1
0
PA2I
PA1I
PA0I
0
0
0
R/W
R/W
R/W
Interrupt Controller
59
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