IC ENCORE XP MCU FLASH 1K 20DIP

 

Z8F011APH020EC

Manufacturer Part NumberZ8F011APH020EC
DescriptionIC ENCORE XP MCU FLASH 1K 20DIP
ManufacturerZilog
SeriesEncore!® XP®
Z8F011APH020EC datasheets

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Warranty: 60 days

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Specifications of Z8F011APH020EC

Core ProcessorZ8Core Size8-Bit
Speed20MHzConnectivityIrDA, UART/USART
PeripheralsBrown-out Detect/Reset, LED, LVD, POR, PWM, WDTNumber Of I /o17
Program Memory Size1KB (1K x 8)Program Memory TypeFLASH
Eeprom Size16 x 8Ram Size256 x 8
Voltage - Supply (vcc/vdd)2.7 V ~ 3.6 VOscillator TypeInternal
Operating Temperature-40°C ~ 105°CPackage / Case20-DIP (0.300", 7.62mm)
Lead Free Status / RoHS StatusContains lead / RoHS non-compliantData Converters-
Other names269-3312  
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Page 119/282

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(BRG[15:0]) that sets the data transmission rate (baud rate) of the UART. The UART data
rate is calculated using the following equation:
UART Data Rate (bits/s)
When the UART is disabled, the Baud Rate Generator functions as a basic 16-bit timer
with interrupt on time-out. Follow the steps below to configure the Baud Rate Generator
as a timer with interrupt on time-out:
1. Disable the UART by clearing the REN and TEN bits in the UART Control 0 register
to 0.
2. Load the acceptable 16-bit count value into the UART Baud Rate High and Low Byte
registers.
3. Enable the Baud Rate Generator timer function and associated interrupt by setting the
BRGCTL bit in the UART Control 1 register to 1.
When configured as a general purpose timer, the interrupt interval is calculated using the
following equation:
Interrupt Interval s ( )
UART Control Register Definitions
The UART control registers support the UART and the associated Infrared Encoder/
Decoders. For more information on infrared operation, see
page 117.
UART Control 0 and Control 1 Registers
The UART Control 0 (UxCTL0) and Control 1 (UxCTL1) registers
Table
62) configure the properties of the UART’s transmit and receive operations. The
UART Control registers must not be written while the UART is enabled.
Table 61. UART Control 0 Register (U0CTL0)
BITS
7
6
TEN
REN
FIELD
0
0
RESET
R/W
R/W
R/W
ADDR
TEN—Transmit Enable
This bit enables or disables the transmitter. The enable is also controlled by the CTS signal
PS022825-0908
System Clock Frequency (Hz)
-------------------------------------------------------------------------------- -
=
×
16
UART Baud Rate Divisor Value
System Clock Period (s) BRG 15:0
×
=
5
4
3
CTSE
PEN
PSEL
0
0
0
R/W
R/W
R/W
F42H
Universal Asynchronous Receiver/Transmitter
®
Z8 Encore! XP
F082A Series
Product Specification
[
]
Infrared Encoder/Decoder
on
(Table 61
and
2
1
0
SBRK
STOP
LBEN
0
0
0
R/W
R/W
R/W
108