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Z8F011APH020EC
Z8F011APH020EC | |
|---|---|
| Manufacturer Part Number | Z8F011APH020EC |
| Description | IC ENCORE XP MCU FLASH 1K 20DIP |
| Manufacturer | Zilog |
| Series | Encore!® XP® |
| Z8F011APH020EC datasheets |
|
Availability: By request
International delivery:
Warranty: 60 days
×
- We provide standard 60-days warranty for all parts. If warranty differs we always mention it beforehand. In case of return we cover shipping costs.
- If you still have any questions - please contact us
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Specifications of Z8F011APH020EC | |||
|---|---|---|---|
| Core Processor | Z8 | Core Size | 8-Bit |
| Speed | 20MHz | Connectivity | IrDA, UART/USART |
| Peripherals | Brown-out Detect/Reset, LED, LVD, POR, PWM, WDT | Number Of I /o | 17 |
| Program Memory Size | 1KB (1K x 8) | Program Memory Type | FLASH |
| Eeprom Size | 16 x 8 | Ram Size | 256 x 8 |
| Voltage - Supply (vcc/vdd) | 2.7 V ~ 3.6 V | Oscillator Type | Internal |
| Operating Temperature | -40°C ~ 105°C | Package / Case | 20-DIP (0.300", 7.62mm) |
| Lead Free Status / RoHS Status | Contains lead / RoHS non-compliant | Data Converters | - |
| Other names | 269-3312 | ||
PrevNext
←
DBG
←
DBG
←
DBG
•
Read Data Memory (0DH)—The Read Data Memory command reads from Data
Memory. This command is equivalent to the LDE and LDEI instructions. Data can be
read 1 to 65536 bytes at a time (65536 bytes can be read by setting size to 0). If the
device is not in DEBUG mode, this command returns
←
DBG
←
DBG
←
DBG
←
DBG
←
DBG
→
DBG
•
Read Program Memory CRC (0EH)—The Read Program Memory CRC com-
mand computes and returns the Cyclic Redundancy Check (CRC) of Program Mem-
ory using the 16-bit CRC-CCITT polynomial. If the device is not in DEBUG mode,
this command returns
mands, there is a delay from issuing of the command until the OCD returns the data.
The OCD reads the Program Memory, calculates the CRC value, and returns the re-
sult. The delay is a function of the Program Memory size and is approximately equal
to the system clock period multiplied by the number of bytes in the Program Memory.
←
DBG
→
DBG
→
DBG
•
Step Instruction (10H)—The Step Instruction command steps one assembly in-
struction at the current Program Counter (PC) location. If the device is not in DEBUG
mode or the Flash Read Protect Option bit is enabled, the OCD ignores this command.
←
DBG
•
Stuff Instruction (11H)—The Stuff Instruction command steps one assembly in-
struction and allows specification of the first byte of the instruction. The remaining 0-
4 bytes of the instruction are read from Program Memory. This command is useful for
stepping over instructions where the first byte of the instruction has been overwritten
by a Breakpoint. If the device is not in DEBUG mode or the Flash Read Protect Option
bit is enabled, the OCD ignores this command.
←
DBG
←
DBG
•
Execute Instruction (12H)—The Execute Instruction command allows sending an
entire instruction to be executed to the eZ8 CPU. This command can also step over
Breakpoints. The number of bytes to send for the instruction depends on the opcode.
PS022825-0908
Size[15:8]
Size[7:0]
1-65536 data bytes
0DH
Data Memory Address[15:8]
Data Memory Address[7:0]
Size[15:8]
Size[7:0]
1-65536 data bytes
for the CRC value. Unlike most other OCD Read com-
FFFFH
0EH
CRC[15:8]
CRC[7:0]
10H
11H
opcode[7:0]
®
Z8 Encore! XP
F082A Series
Product Specification
for the data.
FFH
On-Chip Debugger
183
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