IC MCU 1.5K FLASH 16-TSSOP

MC68HC908QY1VDTE

Manufacturer Part NumberMC68HC908QY1VDTE
DescriptionIC MCU 1.5K FLASH 16-TSSOP
ManufacturerFreescale Semiconductor
SeriesHC08
MC68HC908QY1VDTE datasheet
 


Specifications of MC68HC908QY1VDTE

Core ProcessorHC08Core Size8-Bit
Speed8MHzPeripheralsLVD, POR, PWM
Number Of I /o13Program Memory Size1.5KB (1.5K x 8)
Program Memory TypeFLASHRam Size128 x 8
Voltage - Supply (vcc/vdd)2.7 V ~ 5.5 VOscillator TypeInternal
Operating Temperature-40°C ~ 105°CPackage / Case16-TSSOP
Processor SeriesHC08QCoreHC08
Data Bus Width8 bitData Ram Size128 B
Maximum Clock Frequency8 MHzNumber Of Programmable I/os14
Number Of Timers2Maximum Operating Temperature+ 105 C
Mounting StyleSMD/SMTDevelopment Tools By SupplierFSICEBASE, M68CBL05AE, DEMO908QB8, DEMO908QC16
Minimum Operating Temperature- 40 CLead Free Status / RoHS StatusLead free / RoHS Compliant
Eeprom Size-Data Converters-
Connectivity-  
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Development Support
Modes
Reset
Vector High
User
$FFFE
Monitor
$FEFE
15.3.1.4 Data Format
Communication with the monitor ROM is in standard non-return-to-zero (NRZ) mark/space data format.
Transmit and receive baud rates must be identical.
START
BIT 0
BIT 1
BIT
15.3.1.5 Break Signal
A start bit (logic 0) followed by nine logic 0 bits is a break signal. When the monitor receives a break signal,
it drives the PTA0 pin high for the duration of two bits and then echoes back the break signal.
0
1
2
15.3.1.6 Baud Rate
The monitor communication baud rate is controlled by the frequency of the external or internal oscillator
and the state of the appropriate pins as shown in
Table 15-1
also lists the bus frequencies to achieve standard baud rates. The effective baud rate is the
bus frequency divided by 256 when using an external oscillator. When using the internal oscillator in
forced monitor mode, the effective baud rate is the bus frequency divided by 335.
15.3.1.7 Commands
The monitor ROM firmware uses these commands:
READ (read memory)
WRITE (write memory)
IREAD (indexed read)
IWRITE (indexed write)
READSP (read stack pointer)
RUN (run user program)
144
Table 15-2. Mode Difference
Functions
Reset
Break
Break
Vector Low
Vector High
Vector Low
$FFFF
$FFFC
$FFFD
$FEFF
$FEFC
$FEFD
BIT 6
BIT 2
BIT 3
BIT 4
BIT 5
Figure 15-13. Monitor Data Format
MISSING STOP BIT
2-STOP BIT DELAY BEFORE ZERO ECHO
0
3
4
5
6
7
Figure 15-14. Break Transaction
Table
15-1.
MC68HC908QY/QT Family Data Sheet, Rev. 6
SWI
SWI
Vector High
Vector Low
$FFFC
$FFFD
$FEFC
$FEFD
NEXT
START
STOP
BIT 7
BIT
BIT
1
2
3
4
5
6
7
Freescale Semiconductor