MC68HC908QY1CDTE Freescale Semiconductor, MC68HC908QY1CDTE Datasheet - Page 102

IC MCU 1.5K FLASH 16-TSSOP

MC68HC908QY1CDTE

Manufacturer Part Number
MC68HC908QY1CDTE
Description
IC MCU 1.5K FLASH 16-TSSOP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908QY1CDTE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
1.5KB (1.5K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-TSSOP
Processor Series
HC08Q
Core
HC08
Data Bus Width
8 bit
Data Ram Size
128 B
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
14
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05AE, DEMO908QB8, DEMO908QC16
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC908QY1CDTE
Manufacturer:
FREESCALE
Quantity:
998
Part Number:
MC68HC908QY1CDTE
Manufacturer:
FREESCALE
Quantity:
20 000
Input/Output Ports (PORTS)
12.3.3 Port B Input Pullup Enable Register
The port B input pullup enable register (PTBPUE) contains a software configurable pullup device for each
of the eight port B pins. Each bit is individually configurable and requires the corresponding data direction
register, DDRBx, be configured as input. Each pullup device is automatically and dynamically disabled
when its corresponding DDRBx bit is configured as output.
PTBPUE[7:0] — Port B Input Pullup Enable Bits
102
Table 12-3
1. X = don’t care
2. I/O pin pulled to V
3. Writing affects data register, but does not affect input.
4. Hi-Z = high impedance
PTBPUE
These read/write bits are software programmable to enable pullup devices on port B pins
Bit
X
1
0
1 = Corresponding port B pin configured to have internal pull if its DDRB bit is set to 0
0 = Pullup device is disconnected on the corresponding port B pin regardless of the state of its
DDRB bit.
summarizes the operation of the port B pins.
Address: $000C
DDRB
Reset:
Read:
Write:
Bit
0
0
1
DD
Figure 12-8. Port B Input Pullup Enable Register (PTBPUE)
PTBPUE7
by internal pullup.
Bit 7
0
PTB
X
Bit
X
X
(1)
PTBPUE6
MC68HC908QY/QT Family Data Sheet, Rev. 6
Input, Hi-Z
6
0
Input, V
Table 12-3. Port B Pin Functions
I/O Pin
Output
Mode
PTBPUE5
DD
(2)
(4)
0
5
PTBPUE4
Accesses to DDRB
4
0
DDRB7–DDRB0
DDRB7–DDRB0
DDRB7–DDRB0
Read/Write
PTBPUE3
3
0
PTBPUE2
2
0
PTB7–PTB0
PTBPUE2
Read
Pin
Pin
1
0
Accesses to PTB
Freescale Semiconductor
PTBPUE0
Bit 0
0
PTB7–PTB0
PTB7–PTB0
PTB7–PTB0
Write
(3)
(3)

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