MC68HC908QY4VDTE Freescale Semiconductor, MC68HC908QY4VDTE Datasheet - Page 116

IC MCU 4K FLASH 8MHZ 16-TSSOP

MC68HC908QY4VDTE

Manufacturer Part Number
MC68HC908QY4VDTE
Description
IC MCU 4K FLASH 8MHZ 16-TSSOP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908QY4VDTE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
16-TSSOP
Processor Series
HC08Q
Core
HC08
Data Bus Width
8 bit
Data Ram Size
128 B
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
14
Number Of Timers
2
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05AE, DEMO908QB8, DEMO908QC16
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC908QY4VDTE
Manufacturer:
Freescale
Quantity:
3 250
System Integration Module (SIM)
The SIM counter is held in reset from the execution of the STOP instruction until the beginning of stop
recovery. It is then used to time the recovery period.
Figure 13-18
13.8 SIM Registers
The SIM has three memory mapped registers.
116
ADDRESS BUS
INTERRUPT
BUSCLKX4
ADDRESS BUS
NOTE: Previous data can be operand data or the STOP opcode, depending on the last instruction.
shows the stop mode recovery time from interrupt or break.
To minimize stop current, all pins configured as inputs should be driven to
a logic 1 or logic 0.
DATA BUS
CPUSTOP
R/W
Figure 13-18. Stop Mode Recovery from Interrupt
Address
STOP ADDR
$FE00
$FE01
$FE03
STOP +1
Figure 13-17. Stop Mode Entry Timing
MC68HC908QY/QT Family Data Sheet, Rev. 6
PREVIOUS DATA
Table 13-4. SIM Registers
STOP ADDR + 1
Register
SRSR
BFCR
BSR
Table 13-4
STOP + 2
NOTE
STOP RECOVERY PERIOD
NEXT OPCODE
Figure 13-17
STOP + 2
shows the mapping of these registers.
SAME
Access Mode
shows stop mode entry timing and
User
User
User
SP
SAME
SP – 1
SAME
SAME
Freescale Semiconductor
SP – 2
SP – 3

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