MC908LJ24CPBE Freescale Semiconductor, MC908LJ24CPBE Datasheet - Page 131

• Manufacturer Part Number: MC908LJ24CPBE
• Description: IC MCU 24K FLASH 8MHZ SPI 64LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908LJ24CPBE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, IRSCI, SPI
• Peripherals: LCD, LVD, POR, PWM
• Number Of I /o: 40
• Program Memory Size: 24KB (24K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Processor Series: HC08LJ
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V, 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68EML08LJLKE, ZK-HC08LX-A, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 6-ch x 10-bit
• Controller Family/series: HC08
• No. Of I/o's: 40
• Ram Memory Size: 768Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

8.6.4 PLL VCO Range Select Register
MC68HC908LJ24/LK24 — Rev. 2.1
Freescale Semiconductor
NOTE:
Address:
The PLL VCO range select register (PMRS) contains the programming
information required for the hardware configuration of the VCO.
VRS[7:0] — VCO Range Select Bits
The VCO range select bits have built-in protection such that they cannot
be written when the PLL is on (PLLON = 1) and such that the VCO clock
cannot be selected as the source of the base clock (BCS = 1) if the VCO
range select bits are all clear.
The PLL VCO range select register must be programmed correctly.
Incorrect programming can result in failure of the PLL to achieve lock.
Reset:
Read:
Write:
These read/write bits control the hardware center-of-range linear
multiplier L which, in conjunction with E (See
8.4.6 Programming the
controls the hardware center-of-range frequency, f
cannot be written when the PLLON bit in the PCTL is set. (See
Special Programming
range select register disables the PLL and clears the BCS bit in the
PLL control register (PCTL). (See
and
register to $40 for a default range multiply value of 64.
8.4.7 Special Programming
Figure 8-8. PLL VCO Range Select Register (PMRS)
$003A
VRS7
Bit 7
0
Clock Generator Module (CGM)
VRS6
6
1
VRS5
5
0
Exceptions.) A value of $00 in the VCO
PLL, and
VRS4
4
0
8.4.8 Base Clock Selector Circuit
Exceptions.). Reset initializes the
8.6.1 PLL Control
VRS3
3
0
Clock Generator Module (CGM)
8.4.3 PLL
VRS2
2
0
VRS
. VRS[7:0]
Register.),
VRS1
CGM Registers
Circuits,
1
0
Data Sheet
VRS0
Bit 0
8.4.7
0
131