MC908LJ24CPBE Freescale Semiconductor, MC908LJ24CPBE Datasheet - Page 183

• Manufacturer Part Number: MC908LJ24CPBE
• Description: IC MCU 24K FLASH 8MHZ SPI 64LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908LJ24CPBE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, IRSCI, SPI
• Peripherals: LCD, LVD, POR, PWM
• Number Of I /o: 40
• Program Memory Size: 24KB (24K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Processor Series: HC08LJ
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V, 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68EML08LJLKE, ZK-HC08LX-A, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 6-ch x 10-bit
• Controller Family/series: HC08
• No. Of I/o's: 40
• Ram Memory Size: 768Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

10.6.2 ERARNGE
MC68HC908LJ24/LK24 — Rev. 2.1
Freescale Semiconductor
ERARNGE is used to erase a range of locations in FLASH.
There are two sizes of erase ranges: a page or the entire array. The
ERARNGE will erase the page (128 consecutive bytes) in FLASH
specified by the address ADDRH:ADDRL. This address can be any
address within the page. Calling ERARNGE with ADDRH:ADDRL equal
to $FFFF will erase the entire FLASH array (mass erase). Therefore,
care must be taken when calling this routine to prevent an accidental
mass erase.
The ERARNGE routine do not use a data array. The DATASIZE byte is
a dummy byte that is also not used.
The coding example below is to perform a page erase, from
$EF00–$EF7F. The Initialization subroutine is the same as the coding
example for PRGRNGE (see
ERARNGE
MAIN:
Routine Name
Routine Description
Calling Address
Stack Used
Data Block Format
BSR
:
:
LDHX
JSR
:
Monitor ROM (MON)
EQU
INITIALISATION
#FILE_PTR
ERARNGE
Table 10-12. ERARNGE Routine
ERARNGE
Erase a page or the entire array
$FCBE
9 bytes
Bus speed (BUS_SPD)
Data size (DATASIZE)
Starting address (ADDRH)
Starting address (ADDRL)
$FCBE
10.6.1
PRGRNGE).
ROM-Resident Routines
Monitor ROM (MON)
Data Sheet
183