MC908LJ24CPBE Freescale Semiconductor, MC908LJ24CPBE Datasheet - Page 431

IC MCU 24K FLASH 8MHZ SPI 64LQFP

MC908LJ24CPBE

Manufacturer Part Number
MC908LJ24CPBE
Description
IC MCU 24K FLASH 8MHZ SPI 64LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908LJ24CPBE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SPI
Peripherals
LCD, LVD, POR, PWM
Number Of I /o
40
Program Memory Size
24KB (24K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Processor Series
HC08LJ
Core
HC08
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SCI/SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
48
Number Of Timers
4
Operating Supply Voltage
3.3 V, 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68EML08LJLKE, ZK-HC08LX-A, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
6-ch x 10-bit
Controller Family/series
HC08
No. Of I/o's
40
Ram Memory Size
768Byte
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC908LJ24CPBE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC908LJ24CPBER
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
23.5.2 Stop Mode
23.6 Break Module Registers
23.6.1 Break Status and Control Register
MC68HC908LJ24/LK24 — Rev. 2.1
Freescale Semiconductor
Address:
A break interrupt causes exit from stop mode and sets the SBSW bit in
the break status register.
These registers control and monitor operation of the break module:
The break status and control register (BRKSCR) contains break module
enable and status bits.
BRKE — Break Enable Bit
Reset:
Read:
Write:
This read/write bit enables breaks on break address register matches.
Clear BRKE by writing a logic 0 to bit 7. Reset clears the BRKE bit.
Figure 23-3. Break Status and Control Register (BRKSCR)
1 = Breaks enabled on 16-bit address match
0 = Breaks disabled on 16-bit address match
Break status and control register (BRKSCR)
Break address register high (BRKH)
Break address register low (BRKL)
SIM break status register (SBSR)
SIM break flag control register (SBFCR)
$FE0E
BRKE
Bit 7
0
Break Module (BRK)
= Unimplemented
BRKA
6
0
5
0
0
4
0
0
3
0
0
2
0
0
Break Module Registers
Break Module (BRK)
1
0
0
Data Sheet
Bit 0
0
0
431

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