MC908LJ24CPBE Freescale Semiconductor, MC908LJ24CPBE Datasheet - Page 440

• Manufacturer Part Number: MC908LJ24CPBE
• Description: IC MCU 24K FLASH 8MHZ SPI 64LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908LJ24CPBE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, IRSCI, SPI
• Peripherals: LCD, LVD, POR, PWM
• Number Of I /o: 40
• Program Memory Size: 24KB (24K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Processor Series: HC08LJ
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V, 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68EML08LJLKE, ZK-HC08LX-A, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 6-ch x 10-bit
• Controller Family/series: HC08
• No. Of I/o's: 40
• Ram Memory Size: 768Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Electrical Specifications
24.8 5V Control Timing
Data Sheet
440
Notes:
Notes:
Capacitance
POR re-arm voltage
POR rise-time ramp rate
Monitor mode entry voltage (at IRQ pin)
Pullup resistors
Low-voltage inhibit, trip falling voltage
Low-voltage inhibit, trip rising voltage
Internal operating frequency
RST input pulse width low
1. V
2. Typical values reflect average measurements at midpoint of voltage range, 25 °C only.
3. Run (operating) I
4. Wait I
5. The 8kHz clock is from a 32kHz external square wave clock input at OSC1, for the driving the RTC. Due to loading effects,
1. V
6. LCD driver configured for low current mode.
7. Maximum is highest voltage that POR is guaranteed.
8. If minimum V
9. R
2. Some modules may require a minimum frequency greater than dc for proper operation; see appropriate table for this
3. Minimum pulse width reset is guaranteed to be recognized. It is possible for a smaller pulse width to cause a reset.
Ports (as input or output)
PTA0–PTA3 and PTD4–PTD7 as KBI0–KBI7
RST, IRQ
100 pF on all outputs. C
all outputs. C
the I
V
information.
DD
SS
PU1
DD
= 0 Vdc; timing shown with respect to 20% V
DD
= 3.0 to 3.6 Vdc, V
is reached.
and R
DD
values will be larger when a 32kHz crystal circuit is connected.
measured using external square wave clock source. All inputs 0.2 V from rail. No dc loads. Less than 100 pF on
PU2
DD
L
(9)
= 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly affects wait I
are measured at V
is not reached before the internal POR reset is released,
DD
Characteristic
(7)
measured using external square wave clock source. All inputs 0.2 V from rail. No dc loads. Less than
Characteristic
SS
L
(8)
= 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly affects run I
(3)
= 0 Vdc, T
Table 24-5. 3.3V DC Electrical Characteristics
(2)
(1)
DD
A
= 3.3V.
Table 24-6. 5V Control Timing
= T
(1)
L
to T
Electrical Specifications
H
, unless otherwise noted.
DD
and 70% V
Symbol
V
V
C
V
R
R
R
TRIPF
TRIPR
C
V
OUT
POR
POR
DD
PU1
PU2
IN
HI
, unless otherwise noted.
Symbol
RST
t
f
OP
IRL
1.5 × V
0.02
Min
2.1
2.2
21
21
must be driven low externally until minimum
—
—
0
DD
MC68HC908LJ24/LK24 — Rev. 2.1
Min
750
—
Typ
30
30
—
—
—
—
—
—
—
(2)
Freescale Semiconductor
Max
—
8
Max
100
2.8
2.9
DD
12
39
39
—
8
8
.
MHz
Unit
DD
ns
V/ms
Unit
mV
kΩ
kΩ
pF
.
V
V
V