MC908LJ24CPBE Freescale Semiconductor, MC908LJ24CPBE Datasheet - Page 64

IC MCU 24K FLASH 8MHZ SPI 64LQFP

MC908LJ24CPBE

Manufacturer Part Number
MC908LJ24CPBE
Description
IC MCU 24K FLASH 8MHZ SPI 64LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908LJ24CPBE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SPI
Peripherals
LCD, LVD, POR, PWM
Number Of I /o
40
Program Memory Size
24KB (24K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Processor Series
HC08LJ
Core
HC08
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SCI/SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
48
Number Of Timers
4
Operating Supply Voltage
3.3 V, 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68EML08LJLKE, ZK-HC08LX-A, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
6-ch x 10-bit
Controller Family/series
HC08
No. Of I/o's
40
Ram Memory Size
768Byte
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC908LJ24CPBE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC908LJ24CPBER
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Memory Map
Data Sheet
64
# Non-volatile FLASH register; write by programming.
$FE0A
$FE0B
$FE0C
$FE0D
$FE0E
$FFCF
$FE0F
$FFFF
Addr.
$FE09
Low-Voltage Inhibit Status
Break Status and Control
COP Control Register
FLASH Block Protect
Register Name
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 13 of 13)
Break Address
Break Address
Register High
Register Low
(BRKSCR)
(COPCTL)
Reserved
Reserved
Reserved
(FLBPR)
Register
Register
Register
(LVISR)
(BRKH)
(BRKL)
#
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read: LVIOUT
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
X = Indeterminate
BRKE
Bit 15
BPR7
Bit 7
Bit 7
R
R
R
0
0
0
0
BRKA
BPR6
LVIIE
14
R
R
R
6
0
6
0
0
0
Memory Map
BPR5
LVIIF
Writing clears COP counter (any value)
13
R
R
R
5
0
5
0
0
0
0
Unaffected by reset; $FF when blank
Low byte of reset vector
= Unimplemented
LVIIACK
Unaffected by reset
BPR4
12
R
R
R
4
0
4
0
0
0
0
0
BPR3
MC68HC908LJ24/LK24 — Rev. 2.1
11
R
R
R
3
0
3
0
0
0
0
0
BPR2
Freescale Semiconductor
10
R
R
R
R
0
2
0
0
0
0
0
2
= Reserved
BPR1
R
R
R
9
1
0
1
0
0
0
0
0
BPR0
Bit 0
Bit 8
Bit 0
R
R
R
0
0
0
0
0
0

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