MC908LJ24CPKE Freescale Semiconductor, MC908LJ24CPKE Datasheet - Page 267

• Manufacturer Part Number: MC908LJ24CPKE
• Description: IC MCU 8BIT 24K FLASH 80-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908LJ24CPKE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, IRSCI, SPI
• Peripherals: LCD, LVD, POR, PWM
• Number Of I /o: 48
• Program Memory Size: 24KB (24K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

13.9 SCI During Break Module Interrupts
13.10 I/O Signals
13.10.1 PTB0/TxD (Transmit Data)
13.10.2 PTB1/RxD (Receive Data)
MC68HC908LJ24/LK24 — Rev. 2.1
Freescale Semiconductor
Infrared Serial Communications Interface Module (IRSCI)
The system integration module (SIM) controls whether status bits in other
modules can be cleared during interrupts generated by the break
module. The BCFE bit in the SIM break flag control register (SBFCR)
enables software to clear status bits during the break state.
To allow software to clear status bits during a break interrupt, write a
logic 1 to the BCFE bit. If a status bit is cleared during the break state, it
remains cleared when the MCU exits the break state.
To protect status bits during the break state, write a logic 0 to the BCFE
bit. With BCFE at logic 0 (its default state), software can read and write
I/O registers during the break state without affecting status bits. Some
status bits have a two-step read/write clearing procedure. If software
does the first step on such a bit before the break, the bit cannot change
during the break state as long as BCFE is at logic 0. After the break,
doing the second step clears the status bit.
The two IRSCI I/O pins are:
The PTB0/TxD pin is the serial data (standard or infrared) output from
the SCI transmitter. The IRSCI shares the PTB0/TxD pin with port B.
When the IRSCI is enabled, the PTB0/TxD pin is an output regardless of
the state of the DDRB0 bit in data direction register B (DDRB). TxD pin
has high current (15mA) sink capability when the LEDB0 bit is set in the
port B LED control register ($000C).
The PTB1/RxD pin is the serial data input to the IRSCI receiver. The
IRSCI shares the PTB1/RxD pin with port B. When the IRSCI is enabled,
the PTB1/RxD pin is an input regardless of the state of the DDRB1 bit in
data direction register B (DDRB).
•
•
PTB0/TxD — Transmit data
PTB1/RxD — Receive data
Infrared Serial Communications Interface Module (IRSCI)
SCI During Break Module Interrupts
Data Sheet
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