MC908LJ24CPKE Freescale Semiconductor, MC908LJ24CPKE Datasheet - Page 328

IC MCU 8BIT 24K FLASH 80-LQFP

MC908LJ24CPKE

Manufacturer Part Number
MC908LJ24CPKE
Description
IC MCU 8BIT 24K FLASH 80-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908LJ24CPKE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SPI
Peripherals
LCD, LVD, POR, PWM
Number Of I /o
48
Program Memory Size
24KB (24K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC908LJ24CPKE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Multi-Master IIC Interface (MMIIC)
15.5.5 Multi-Master IIC Data Transmit Register (MMDTR)
Data Sheet
328
Address:
MMTXBE — Multi-Master Transmit Buffer Empty
MMRXBF — Multi-Master Receive Buffer Full
When the MMIIC module is enabled, MMEN = 1, data written into this
register depends on whether module is in master or slave mode.
In slave mode, the data in MMDTR will be transferred to the output circuit
when:
Reset:
Read:
Write:
Figure 15-6. Multi-Master IIC Data Transmit Register (MMDTR)
This flag indicates the status of the data transmit register (MMDTR).
When the CPU writes the data to the MMDTR, the MMTXBE flag will
be cleared. MMTXBE is set when MMDTR is emptied by a transfer of
its data to the output circuit. Reset sets this bit.
This flag indicates the status of the data receive register (MMDRR).
When the CPU reads the data from the MMDRR, the MMRXBF flag
will be cleared. MMRXBF is set when MMDRR is full by a transfer of
data from the input circuit to the MMDRR. Reset clears this bit.
1 = Data transmit register empty
0 = Data transmit register full
1 = Data receive register full
0 = Data receive register empty
the module detects a matched calling address (MMATCH = 1),
with the calling master requesting data (MMSRW = 1); or
the previous data in the output circuit has be transmitted and the
receiving master returns an acknowledge bit, indicated by a
received acknowledge bit (MMRXAK = 0).
MMTD7
$006E
Bit 7
Multi-Master IIC Interface (MMIIC)
1
MMTD6
6
1
MMTD5
5
1
MMTD4
4
1
MMTD3
MC68HC908LJ24/LK24 — Rev. 2.1
3
1
MMTD2
Freescale Semiconductor
2
1
MMTD1
1
1
MMTD0
Bit 0
1

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