HD6417041AVF16V Renesas Electronics America, HD6417041AVF16V Datasheet - Page 25

IC SUPERH MCU ROMLESS 144QFP

HD6417041AVF16V

Manufacturer Part Number
HD6417041AVF16V
Description
IC SUPERH MCU ROMLESS 144QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7040r
Datasheets

Specifications of HD6417041AVF16V

Core Processor
SH-2
Core Size
32-Bit
Speed
28.7MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
98
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417041AVF16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
The SH-SDP additionally has a repeat start (RS) register, a repeat end (RE) register, and a modulo
(MOD) register.
The RS and RE registers are used to control program repetition (loops). The number of iterations
is specified in the SR register’s repeat counter (RC), the repeat start address is specified in the RS
register, and the repeat end address is specified in the RE register. The address values stored in the
RS and RE registers are not always the same as the physical starting address and ending address of
the repeat.
The MOD register uses modulo addressing to buffer the repeat data. Modulo addressing is
specified by DMX or DMY, the modulo end address (ME) is specified in the top 16 bits of the
MOD register, and the modulo start address (MS) is specified in the bottom 16 bits. The DMX and
DMY bits cannot simultaneously specify modulo addressing. Modulo addressing can be used for
X and Y data transfers (MOVX and MOVY). It cannot be used in single data transfers (MOVS).
Figure 2.4 shows the control registers. Table 2.1 shows the bits of the SR register.
31 28 27
31
31
31
·······
ME: Modulo end address
MS: Modulo start address
RC
16 15 12 11
Figure 2.4 Organization of the Control Registers (SH-DSP)
ME
·······
DMY
16 15
DMX
10
RE
RS
M
9 8 7
Q
I3 I2 I1 I0
MS
4
RF1 RF0
3
Rev. 5.00 Jun 30, 2004 page 9 of 512
2 1 0
S T
Section 2 Register Configuration
0
0
0
Status register (SR)
Repeat start register (RS)
Repeat end register (RE)
Modulo register (MOD)
REJ09B0171-0500O

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