HD6417041AVF16V Renesas Electronics America, HD6417041AVF16V Datasheet - Page 385

IC SUPERH MCU ROMLESS 144QFP

HD6417041AVF16V

Manufacturer Part Number
HD6417041AVF16V
Description
IC SUPERH MCU ROMLESS 144QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7040r
Datasheets

Specifications of HD6417041AVF16V

Core Processor
SH-2
Core Size
32-Bit
Speed
28.7MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
98
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417041AVF16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
6.3.17
Description: Arithmetically shifts the contents of the Sx or Dz operand and stores the result in the
Dz operand. The amount of the shift is specified by the Sy operand or the immediate value imm
operand. When the shift amount is positive, it shifts left. When the shift amount is negative, it
shifts right. When conditions are specified for DCT and DCF, the instruction is executed when
those conditions are TRUE. When they are FALSE, the instruction is not executed.
When conditions are not specified, the DC bit of the DSR register is updated according to the
specifications for the CS bits. The N, Z, V, and GT bits of the DSR register are also updated. If
conditions are specified, the DC, N, Z, V, and GT bits are not updated even is the conditions were
true and the instruction was executed.
Format
PSHA
Sx,Sy,Dz
DCT PSHA
Sx,Sy,Dz
DCF PSHA
Sx,Sy,Dz
PSHA #imm,Dz if imm
[if cc] PSHA (Shift Arithmetically with Condition): DSP Arithmetic Shift
Instruction
Abstract
if Sy
if Sy 0, Sx
if DC 1 & Sy
Sx
if DC 1 & Sy 0,
Sx
if DC 0, nop
if DC 0 & Sy
Sx
if DC 0 & Sy 0,
Sx
if DC 1, nop
Dz
if imm 0, Dz
Sy Dz
Sy Dz
Sy– Dz
Sy Dz
imm Dz
0, Sx
0,
Sy– Dz
imm Dz
Sy Dz
0,
0,
111110**********
10010001xxyyzzzz
111110**********
10010010xxyyzzzz
111110**********
10010011xxyyzzzz
111110**********
00010iiiiiiizzzz
Code
Rev. 5.00 Jun 30, 2004 page 369 of 512
1
1
1
1
Cycle
Section 6 Instruction Descriptions
DC Bit
Update
Update
REJ09B0171-0500O
SH-1
Instructions
Applicable
SH-2
SH-
DSP

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