HD6417041AVF16V Renesas Electronics America, HD6417041AVF16V Datasheet - Page 505

• Manufacturer Part Number: HD6417041AVF16V
• Description: IC SUPERH MCU ROMLESS 144QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7040r

Specifications of HD6417041AVF16V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 28.7MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Unconditional Branch Instructions (Common, or SH-2 CPU, SH-DSP): Include the following
instruction types:
The pipeline has three stages: IF, ID, and EX (figure 7.82). Unconditionally branched instructions
are delay branched. The branch destination address is calculated in the EX stage. The instruction
following the unconditional branch instruction (instruction A), that is, the delay slot instruction is
not fetched and discarded as conditional branch instructions are, but is instead executed. Note that
the ID slot of the delay slot instruction does stall for one cycle. The branch destination instruction
starts its fetch from the slot after the slot that has the EX stage of instruction A.
BRA
BRAF
BSR
BSRF
JMP
JSR
RTS
Branch destination
label
Rm (SH-2, SH-DSP CPU)
label
Rm (SH-2, SH-DSP CPU)
@Rm
@Rm
Instruction A
Delay slot
Figure 7.82 Unconditional Branch Instruction Pipeline
.....
.....
IF
ID
IF
EX
—
ID
IF
EX MA WB
ID
IF
Rev. 5.00 Jun 30, 2004 page 489 of 512
EX
ID
EX
.....
Section 7 Pipeline Operation
.....
REJ09B0171-0500O
: Slot