HD6417041AVF16V Renesas Electronics America, HD6417041AVF16V Datasheet - Page 57

IC SUPERH MCU ROMLESS 144QFP

HD6417041AVF16V

Manufacturer Part Number
HD6417041AVF16V
Description
IC SUPERH MCU ROMLESS 144QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7040r
Datasheets

Specifications of HD6417041AVF16V

Core Processor
SH-2
Core Size
32-Bit
Speed
28.7MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
98
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417041AVF16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Place data so the top 16 bits of the modulo start and end address are the same, since the modulo
start address only swaps the bottom 16 bits of the address register.
Note: When using addition index as the DSP data addressing, the address pointer may exceed
4.5.4
The following shows how DSP addressing works in the execution stage (EX) of a pipeline
(including modulo addressing).
Inc.
Inc.
Inc.
if ( Operation is MOVX.W MOVY.W ) {
have not been updated */
}
else if ( Operation is MOVS.W or MOVS.L ) {
been updated */
ABx=Ax; ABy=Ay’
/* memory access cycle uses Abx and Aby. The addresses to be used
/* Ax is one of R4,5 */
if ( DMX==0 || DMX==1 @@ DMY==1 )} Ax=Ax+(+2 or R8[Ix} or +0);
/* Inc,Index,Not-Update */
else if (!not-update) Ax=modulo( Ax, (+2 or R8[Ix]) );
/* Ay is one of R6,7 */
if ( DMY==0 ) Ay=Ay+(+2 or R9[Iy] or +0; /* Inc,Index,Not-Update */
else if (! not-update) Ay=modulo( Ay, (+2 or R9[Iy]) );
if ( Addressing is Nop, Inc, Add-index-reg ) {
this value without matching ME. Should this occur, the address pointer will not return to
the modulo start address.
DSP Addressing Operation
R4: H'C008
R4: H'C00A
R4: H'C00C
R4: H'C008
MAB=As;
/* memory access cycle uses MAB. The address to be used has not
/* As is one of R2–5 */
(Becomes the modulo start address when the modulo end address is
reached)
Rev. 5.00 Jun 30, 2004 page 41 of 512
Section 4 Instruction Features
REJ09B0171-0500O

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