HD6417041AVF16V Renesas Electronics America, HD6417041AVF16V Datasheet - Page 66

• Manufacturer Part Number: HD6417041AVF16V
• Description: IC SUPERH MCU ROMLESS 144QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7040r

Specifications of HD6417041AVF16V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 28.7MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 4 Instruction Features
4.7
4.7.1
ALU fixed decimal point operations basically work with a 32-bit unit to which 8 guard bits are
added for a total of 40 bits. When the source operand is a register without guard bits, the register’s
sign bit is extended and copied to the guard bits. When the destination operand is a register
without guard bits, the lower 32 bits of the operation result are stored in the destination register.
ALU fixed decimal point operations are performed between registers. The source and destination
operands are selected independently from the DSP register. When there are guard bits in the
selected register, the operation is also executed on the guard bits. These operations are executed in
the DSP stage (the last stage) of the pipeline.
Whenever an ALU arithmetic operation is executed, the DSR register’s DC, N, Z, V, and GT bits
are updated by the operation result. For conditional instructions, however, condition bits are not
updated even when the specified condition is achieved. For unconditional instructions, the bits are
updated according to the operation result.
The condition reflected in the DC bit is selected with the CS[2:0] bits. The DC bits of the PADDC
and PSUB instructions, however, are updated regardless of the CS bit settings. In the PADDC
instruction, it is updated as a carry flag; in the PSUB instruction, it is updated as a borrow flag.
Figure 4.6 shows the ALU fixed decimal point operation flowchart.
Rev. 5.00 Jun 30, 2004 page 50 of 512
REJ09B0171-0500O
ALU Fixed Decimal Point Operations
Function