IC ARM CORTEX MCU 128K 108-BGA

LM3S2620-IBZ25-A2

Manufacturer Part NumberLM3S2620-IBZ25-A2
DescriptionIC ARM CORTEX MCU 128K 108-BGA
ManufacturerTexas Instruments
SeriesStellaris® 2000
LM3S2620-IBZ25-A2 datasheets
 


Specifications of LM3S2620-IBZ25-A2

Core ProcessorARM® Cortex-M3™Core Size32-Bit
Speed25MHzConnectivityCAN, I²C, IrDA, Microwire, QEI, SPI, SSI, UART/USART
PeripheralsBrown-out Detect/Reset, POR, PWM, WDTNumber Of I /o52
Program Memory Size128KB (128K x 8)Program Memory TypeFLASH
Ram Size32K x 8Voltage - Supply (vcc/vdd)2.25 V ~ 2.75 V
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case108-NFBGALead Free Status / RoHS StatusLead free / RoHS Compliant
Eeprom Size-Data Converters-
Other names726-1145
LM3S2620-IBZ25
  
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S T E L L A R I S E R R A T A
®
Stellaris
LM3S2620 RevA2 Errata
This document contains known errata at the time of publication for the Stellaris
microcontroller. The table below summarizes the errata and lists the affected revisions. See the
data sheet for more details.
See also the ARM® Cortex™-M3 errata, ARM publication number PR326-PRDC-009450 v2.0.
Date
Revision
Description
September 2010
2.10
Added issue “Hibernation module does not operate correctly” on page 5, replacing previous
Hibernation module errata items.
Minor edits and clarifications.
July 2010
2.9
Added issue “The RTRIS bit in the UARTRIS register is only set when the interrupt is
enabled” on page 8.
June 2010
2.8
Added issue “External reset does not reset the XTAL to PLL Translation (PLLCFG)
register” on page 5.
May 2010
2.7
Removed issue "Hibernation Module 4.194304-MHz oscillator supports a limited range of crystal
load capacitance values" as it does not apply to this part.
Minor edits and clarifications.
April 2010
2.6
Removed issue "Writes to Hibernation module registers sometimes fail" as it does not apply to this
part.
Added issue "Hibernation Module 4.194304-MHz oscillator supports a limited range of crystal load
capacitance values."
Minor edits and clarifications.
April 2010
2.5
Removed issue "Setting Bit 7 in I2C Master Timer Period (I2CMTPR) register may have unexpected
results". The data sheet description has changed such that this is no longer necessary.
Minor edits and clarifications.
February 2010
2.4
Added issue “The General-Purpose Timer match register does not function correctly in 32-bit
mode” on page 7.
Added issue "Setting Bit 7 in I2C Master Timer Period (I2CMTPR) register may have unexpected
results".
Jan 2010
2.3
"Hard Fault possible when waking from Sleep or Deep-Sleep modes and Cortex-M3 Debug Access
Port (DAP) is enabled" has been removed and the content added to the LM3S2620 data sheet.
Dec 2009
2.2
Started tracking revision history.
Erratum
Number
1.1
JTAG pins do not have internal pull-ups enabled at power-on reset
1.2
JTAG INTEST instruction does not work
September 05, 2010/Rev. 2.10
http://www-k.ext.ti.com/sc/technical-support/product-information-centers.htm
Erratum Title
®
LM3S2620
Revision(s) Affected
A1, A2
A1, A2
1
Texas Instruments

LM3S2620-IBZ25-A2 Summary of contents

  • Page 1

    ... Jan 2010 2.3 ■ "Hard Fault possible when waking from Sleep or Deep-Sleep modes and Cortex-M3 Debug Access Port (DAP) is enabled" has been removed and the content added to the LM3S2620 data sheet. Dec 2009 2.2 Started tracking revision history. Erratum Number 1 ...

  • Page 2

    ... Stellaris LM3S2620 A2 Errata Erratum Number 2.1 Clock source incorrect when waking up from Deep-Sleep mode in some configurations 2.2 PLL may not function properly at default LDO setting 2.3 I/O buffer 5-V tolerance issue 2.4 PLL Runs Fast When Using a 3.6864-MHz Crystal 2.5 External reset does not reset the XTAL to PLL Translation (PLLCFG) register 3 ...

  • Page 3

    ... Workaround: Run the system off of the main oscillator (MOSC) with the PLL enabled. In this mode, the clocks are switched at the proper time. September 05, 2010/Rev. 2.10 http://www-k.ext.ti.com/sc/technical-support/product-information-centers.htm ® Stellaris LM3S2620 A2 Errata 3 Texas Instruments ...

  • Page 4

    ... Stellaris LM3S2620 A2 Errata If the main oscillator must be used to clock the system without the PLL, a simple wait loop at the beginning of the interrupt handler for the wake-up event should be used to stall the frequency-dependent operation until the main oscillator has stabilized. Silicon Revision Affected: A1 ...

  • Page 5

    ... This errata item does not apply to many Stellaris devices, including the LM3S1166, LM3S1636, LM3S1969, and LM3S2919. Refer to the Stellaris Product Selector Guide (www.ti.com/stellaris_search) and Errata documents to find an alternative microcontroller that meets the design requirements for your application. Silicon Revision Affected: A1, A2 September 05, 2010/Rev. 2.10 http://www-k.ext.ti.com/sc/technical-support/product-information-centers.htm ® Stellaris LM3S2620 A2 Errata 5 Texas Instruments ...

  • Page 6

    ... Stellaris LM3S2620 A2 Errata 4 GPIO 4.1 GPIO input pin latches in the Low state if pad type is open drain Description: GPIO pins function normally if configured as inputs and the open-drain configuration is disabled. If open drain is enabled while the pin is configured as an input using the GPIO Alternate Function ...

  • Page 7

    ... Description: The GPTM Timer A Match (GPTMTAMATCHR) register triggers a match interrupt when the lower 16 bits match, regardless of the value of the upper 16 bits. Workaround: None. Silicon Revision Affected: A1, A2 September 05, 2010/Rev. 2.10 http://www-k.ext.ti.com/sc/technical-support/product-information-centers.htm ® Stellaris LM3S2620 A2 Errata 7 Texas Instruments ...

  • Page 8

    ... Stellaris LM3S2620 A2 Errata 6 UART 6.1 The RTRIS bit in the UARTRIS register is only set when the interrupt is enabled Description: The RTRIS (UART Receive Time-Out Raw Interrupt Status) bit in the UART Raw Interrupt Status (UARTRIS) register should be set when a receive time-out occurs, regardless of the state of the enable RTIM bit in the UART Interrupt Mask (UARTIM) register ...

  • Page 9

    ... CAN controller that is being accessed during read accesses. Whatever method is used, it must be sure to protect against any asynchronous code that accesses the same CAN controller as the code that it interrupts. September 05, 2010/Rev. 2.10 http://www-k.ext.ti.com/sc/technical-support/product-information-centers.htm ® Stellaris LM3S2620 A2 Errata ® 9 Texas Instruments ...

  • Page 10

    ... Stellaris LM3S2620 A2 Errata Silicon Revision Affected: A1 PWM 8.1 PWM pulses cannot be smaller than dead-band time Description: The dead-band generator in the PWM module has undesirable effects when receiving input pulses from the PWM generator that are shorter than the dead-band time. For example, providing a ...

  • Page 11

    ... Description: In the PWM Interrupt Enable (PWMINTEN) register, the IntPWM0 (bit 0) bit does not function correctly and has no effect on the interrupt status to the ARM Cortex-M3 processor. This bit should not be used. September 05, 2010/Rev. 2.10 http://www-k.ext.ti.com/sc/technical-support/product-information-centers.htm ® Stellaris LM3S2620 A2 Errata 11 Texas Instruments ...

  • Page 12

    ... Stellaris LM3S2620 A2 Errata Workaround: PWM interrupts to the processor should be controlled with the use of the PWM0-PWM2 Interrupt and Trigger Enable (PWMnINTEN) registers. Silicon Revision Affected: A1, A2 8.5 Sync of PWM does not trigger "zero" action Description: If the PWM Generator Control (PWM0GENA) register has the ActZero field set to 0x2, then the output is set to 0 when the counter reaches 0, as expected. However, if the counter is cleared by setting the appropriate bit in the PWM Time Base Sync (PWMSYNC) register, then the " ...

  • Page 13

    ... Texas Instruments Incorporated. ARM and Thumb are registered trademarks and Cortex is a trademark of ARM Limited. Other names and brands may be claimed as the property of others. Texas Instruments Incorporated 108 Wild Basin, Suite 350 Austin, TX 78746 http://www.ti.com/stellaris September 05, 2010/Rev. 2.10 http://www-k.ext.ti.com/sc/technical-support/product-information-centers.htm ® Stellaris LM3S2620 A2 Errata 13 Texas Instruments ...

  • Page 14

    ... Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’ ...