AT89C2051-12SU Atmel, AT89C2051-12SU Datasheet - Page 7

• Manufacturer Part Number: AT89C2051-12SU
• Description: IC 8051 MCU FLASH 2K 20SOIC
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C2051-12SU

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 12MHz
• Connectivity: UART/USART
• Peripherals: LED
• Number Of I /o: 15
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (7.5mm Width)
• Package: 20SOIC
• Device Core: 8051
• Family Name: 89C
• Maximum Speed: 12 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 15
• Interface Type: UART
• Number Of Timers: 2
• Processor Series: AT89x
• Core: 8051
• Data Ram Size: 128 B
• Maximum Clock Frequency: 12 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

9. Idle Mode
10. Power-down Mode
11. Programming The Flash
0368H–MICRO–6/08
In idle mode, the CPU puts itself to sleep while all the on-chip peripherals remain active. The
mode is invoked by software. The content of the on-chip RAM and all the special functions regis-
ters remain unchanged during this mode. The idle mode can be terminated by any enabled
interrupt or by a hardware reset.
The P1.0 and P1.1 should be set to “0” if no external pull-ups are used, or set to “1” if
external pull-ups are used.
It should be noted that when idle is terminated by a hardware reset, the device normally
resumes program execution, from where it left off, up to two machine cycles before the internal
reset algorithm takes control. On-chip hardware inhibits access to internal RAM in this event, but
access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a
port pin when Idle is terminated by reset, the instruction following the one that invokes Idle
should not be one that writes to a port pin or to external memory.
In the power-down mode the oscillator is stopped, and the instruction that invokes power-down
is the last instruction executed. The on-chip RAM and Special Function Registers retain their
values until the power-down mode is terminated. The only exit from power-down is a hardware
reset. Reset redefines the SFRs but does not change the on-chip RAM. The reset should not be
activated before V
enough to allow the oscillator to restart and stabilize.
The P1.0 and P1.1 should be set to “0” if no external pull-ups are used, or set to “1” if
external pull-ups are used.
The AT89C2051 is shipped with the 2K bytes of on-chip PEROM code memory array in the
erased state (i.e., contents = FFH) and ready to be programmed. The code memory array is pro-
grammed one byte at a time. Once the array is programmed, to re-program any non-blank byte,
the entire memory array needs to be erased electrically.
Internal Address Counter: The AT89C2051 contains an internal PEROM address counter
which is always reset to 000H on the rising edge of RST and is advanced by applying a positive
going pulse to pin XTAL1.
Programming Algorithm: To program the AT89C2051, the following sequence is
recommended.
1. Power-up sequence:
2. Set pin RST to “H”
3. Apply the appropriate combination of “H” or “L” logic
Apply power between V
Set RST and XTAL1 to GND
Set pin P3.2 to “H”
levels to pins P3.3, P3.4, P3.5, P3.7 to select one of the programming operations
shown in the PEROM Programming Modes table.
CC
is restored to its normal operating level and must be held active long
CC
and GND pins
AT89C2051
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