ATMEGA88-20MUR Atmel, ATMEGA88-20MUR Datasheet - Page 127

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ATMEGA88-20MUR

Manufacturer Part Number
ATMEGA88-20MUR
Description
MCU AVR 8K FLASH 20MHZ 32QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA88-20MUR

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Interface Type
SPI/TWI/USART
Total Internal Ram Size
1KB
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Package Type
MLF EP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
2545S–AVR–07/10
Figure 15-11. Timer/Counter Timing Diagram, Setting of OCF1x, with Prescaler (f
Figure 15-12
frequency correct PWM mode the OCR1x Register is updated at BOTTOM. The timing diagrams
will be the same, but TOP should be replaced by BOTTOM, TOP-1 by BOTTOM+1 and so on.
The same renaming applies for modes that set the TOV1 Flag at BOTTOM.
Figure 15-12. Timer/Counter Timing Diagram, no Prescaling
Figure 15-13
(PC and PFC PWM)
and ICFn
(CTC and FPWM)
TCNTn
OCRnx
OCFnx
(clk
TOVn
(Update at TOP)
clk
clk
I/O
TCNTn
TCNTn
OCRnx
as TOP)
(clk
I/O
Tn
clk
clk
/8)
I/O
shows the count sequence close to TOP in various modes. When using phase and
shows the same timing data, but with the prescaler enabled.
(FPWM)
I/O
Tn
/1)
(if used
OCRnx - 1
TOP - 1
TOP - 1
Old OCRnx Value
OCRnx
OCRnx Value
TOP
TOP
OCRnx + 1
ATmega48/88/168
BOTTOM
TOP - 1
New OCRnx Value
OCRnx + 2
BOTTOM + 1
TOP - 2
clk_I/O
/8)
127

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