ATMEGA88-20MUR Atmel, ATMEGA88-20MUR Datasheet - Page 271

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ATMEGA88-20MUR

Manufacturer Part Number
ATMEGA88-20MUR
Description
MCU AVR 8K FLASH 20MHZ 32QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA88-20MUR

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Interface Type
SPI/TWI/USART
Total Internal Ram Size
1KB
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Package Type
MLF EP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
26.5
2545S–AVR–07/10
Boot Loader Lock Bits
Figure 26-2. Memory Sections
Note:
If no Boot Loader capability is needed, the entire Flash is available for application code. The
Boot Loader has two separate sets of Boot Lock bits which can be set independently. This gives
the user a unique flexibility to select different levels of protection.
The user can select:
• To protect the entire Flash from a software update by the MCU.
• To protect only the Boot Loader Flash section from a software update by the MCU.
• To protect only the Application Flash section from a software update by the MCU.
• Allow software update in the entire Flash.
See
in Serial or Parallel Programming mode, but they can be cleared by a Chip Erase command
only. The general Write Lock (Lock Bit mode 2) does not control the programming of the Flash
memory by SPM instruction. Similarly, the general Read/Write Lock (Lock Bit mode 1) does not
control reading nor writing by LPM/SPM, if it is attempted.
Table 26-2
1. The parameters in the figure above are given in
Boot Loader Flash Section
Boot Loader Flash Section
Application Flash Section
Application Flash Section
Application Flash Section
Application Flash Section
Program Memory
Program Memory
and
BOOTSZ = '11'
BOOTSZ = '01'
Table 26-3
for further details. The Boot Lock bits can be set in software and
0x0000
End RWW
Start NRWW
End Application
Start Boot Loader
Flashend
0x0000
End RWW
Start NRWW
End Application
Start Boot Loader
Flashend
Boot Loader Flash Section
Boot Loader Flash Section
Application Flash Section
Application Flash Section
Application Flash Section
Table 26-6 on page
Program Memory
Program Memory
BOOTSZ = '10'
BOOTSZ = '00'
ATmega48/88/168
280.
0x0000
End RWW
Start NRWW
End Application
Start Boot Loader
Flashend
0x0000
End RWW, End Application
Start NRWW, Start Boot Loader
Flashend
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