PIC24F16KA102-I/SS Microchip Technology, PIC24F16KA102-I/SS Datasheet - Page 18

IC PIC MCU FLASH 16K 28-SSOP

PIC24F16KA102-I/SS

Manufacturer Part Number
PIC24F16KA102-I/SS
Description
IC PIC MCU FLASH 16K 28-SSOP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr

Specifications of PIC24F16KA102-I/SS

Program Memory Type
FLASH
Program Memory Size
16KB (5.5K x 24)
Package / Case
28-SSOP
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
24
Eeprom Size
512 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24F
Core
PIC
Data Bus Width
16 bit
Data Ram Size
1.5 KB
Interface Type
I2C/IrDA/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
24
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM240001
Minimum Operating Temperature
- 40 C
On-chip Adc
9-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA240017 - MODULE PLUG-IN PIC24F16KA102 PIM
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24F16KA102-I/SS
Manufacturer:
MICRCOHI
Quantity:
20 000
PIC24FXXKAXXX
3.9
To read the code memory, execute a series of TBLRD
instructions and clock out the data using the REGOUT
command.
Table 3-9 provides the ICSP programming details for
reading code memory. In Step 1, the Reset vector is
exited. In Step 2, the 24-bit starting source address for
reading is loaded into the TBLPAG register and the W6
register. The upper byte of the starting source address
is stored in TBLPAG, and the lower 16 bits of the source
address are stored in W6.
TABLE 3-9:
DS39919A-page 18
Step 1: Exit Reset vector.
Step 2: Initialize TBLPAG and the Read Pointer (W6) for TBLRD instruction.
Step 3: Initialize the Write Pointer (W7) to point to the VISI register.
Step 4: Read and clock out the contents of the next two locations of code memory through the VISI register using
Step 5: Reset device internal PC.
Step 6: Repeat Steps 4 and 5 until the required code memory is read.
Command
(Binary)
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0001
0000
0000
0000
0000
0000
0000
0000
0001
0000
0000
0000
0000
0001
0000
0000
0000
Reading Code Memory
the REGOUT command.
SERIAL INSTRUCTION EXECUTION FOR READING CODE MEMORY
000000
040200
000000
200xx0
880190
2xxxx6
207847
000000
BA1B96
000000
000000
<VISI>
000000
BADBB6
000000
000000
BAD3D6
000000
000000
<VISI>
000000
BA0BB6
000000
000000
<VISI>
000000
040200
000000
(Hex)
Data
NOP
GOTO
NOP
MOV
MOV
MOV
MOV
NOP
TBLRDL
NOP
NOP
Clock out contents of VISI register.
NOP
TBLRDH
NOP
NOP
TBLRDH.B
NOP
NOP
Clock out contents of VISI register.
NOP
TBLRDL
NOP
NOP
Clock out contents of VISI register.
NOP
GOTO
NOP
Advance Information
0x200
#<SourceAddress23:16>, W0
W0, TBLPAG
#<SourceAddress15:0>, W6
#VISI, W7
[W6], [W7]
[W6++], [W7]
[++W6], [W7--]
[W6++], [W7]
0x200
To minimize the reading time, the packed instruction
word format, which was used for writing, is also used
for reading (see Figure 3-7). In Step 3, the Write
Pointer, W7, is initialized. In Step 4, two instruction
words are read from code memory, and clocked out of
the device through the VISI register, using the
REGOUT command. Step 4 is repeated until the
required amount of code memory is read.
Description
© 2008 Microchip Technology Inc.

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